category: Blogs – SLD

category: IoT, Security & Automotive

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 3
By Archana Cheruliyil - 19 Dec, 2024 - Comments: 0

This is the third and final of a series from Alphawave Semi on HBM4 and gives and examines custom HBM implementations. Click here for part 1, which gives an overview of the HBM standard, and here for part 2, on HBM implementation challenges. This follows on from our second blog, where we discussed the substantial improvements high bandwidth memory (HBM) provides over traditional memory tec... » read more

Why Circuit Designers And Test Engineers Need Impedance Analyzers
By Gabrielle Duncan - 19 Dec, 2024 - Comments: 0

All engineers know resistance is usually bad news. It generates heat. It reduces efficiency. It wears out components and cuts operational lifetimes. However, resistance is not the only kind of opposition to the current. When more complex waveforms are involved (like in radio applications), the inductors and capacitors contribute a different kind of opposition that is highly dynamic and compl... » read more

Enhancing Power Reliability Through Design-Stage Layout Optimization
By Jeff Wilson - 19 Dec, 2024 - Comments: 0

As integrated circuit (IC) designs continue to scale, the demand for efficient power management, performance optimization and reliable physical layout modification grows more critical. Meeting these power, performance and area (PPA) targets is essential for ensuring that IC designs operate effectively at advanced process nodes. One of the main challenges for design and verification engineers is... » read more

2024 Set The Stage For NoC Interconnect Innovations In SoC Design
By Andy Nightingale - 19 Dec, 2024 - Comments: 0

What a year it’s been for Arteris! Reflecting on 2024, the company achieved exciting milestones and breakthroughs that pushed the boundaries of system-on-chip (SoC) design. A game-changing new technology was unveiled, a major product was launched, and existing solutions were tailored for AI, automotive, high-performance computing (HPC) and more. Along the way, we welcomed new partners and ... » read more

Achieving Successful Multi-Die Signoff
By Vamsi Thatha - 19 Dec, 2024 - Comments: 0

Multi-die designs leveraging 2.5D and 3D technologies are becoming crucial for various electronics applications, including high-performance computing (HPC), artificial intelligence (AI), automotive, and mobile devices. These designs allow the integration of dies from different foundries and technology nodes, enhancing density and interconnect speeds beyond traditional discrete dies. However, th... » read more

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 2
By Archana Cheruliyil - 09 Dec, 2024 - Comments: 0

This is the second in a three-part series from Alphawave Semi on HBM4 and gives insights into HBM implementation challenges. Click here for part 1, for an overview on HBM, and in part 3, we will introduce details of a custom HBM implementation. Implementing a 2.5D System-in-Package (SiP) with High Bandwidth Memory (HBM) is a complex process that spans across architecture definition, designi... » read more

Scaling AI Chip Design With NoC Soft Tiling
By Andy Nightingale - 26 Nov, 2024 - Comments: 0

Tiling is about repeating modular units within the same chip to enhance scalability and efficiency; chiplets involve combining different silicon pieces to achieve a more diverse and powerful system within a single package. Network-on-chip (NoC) soft tiling is complimentary but distinct from chiplets described above as it repeats modular units inside a NoC design. Soft tiling within a NoC off... » read more

Redefining XPU Memory For AI Data Centers Through Custom HBM4: Part 1
By Archana Cheruliyil - 26 Nov, 2024 - Comments: 1

This is the first of a three-part series on HBM4 and gives an overview of the HBM standard. Part 2 will provide insights on HBM implementation challenges, and part 3 will introduce the concept of a custom HBM implementation. Relentless growth in data consumption Recent advances in deep learning have had a transformative effect on artificial intelligence (AI) and the ever-increasing volume of ... » read more

How To Speed Up LVS Verification
By Wael elManhawy - 26 Nov, 2024 - Comments: 0

Layout versus schematic (LVS) comparison is a crucial step in integrated circuit (IC) design verification, ensuring that the physical layout of the circuit matches its schematic representation. The primary goal of LVS is to verify the correctness and functionality of the design. Traditionally, LVS comparison is performed during signoff verification, where dedicated tools compare layout and sche... » read more

Successful Design Of Power Management Chips
By Samad Parekh - 26 Nov, 2024 - Comments: 0

With an industry as large as semiconductors, there are often surprises lurking in some of the more specialized product categories. Everyone knows that huge chips such as CPUs and GPUs command high prices and that memory chips are ubiquitous. However, the domain of power management integrated circuits (PMICs) is less well known to many observers. PMICs are impressive in terms of their technol... » read more

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