category: Low Power-High Performance

category: IoT, Security & Automotive

Complete Migration Guide for Arm-Based Cloud Workloads
By Arm - 16 Oct, 2024 - Comments: 0

Learn in three steps how to migrate your self-managed workloads to Arm virtual machines for superior price performance and energy efficiency across a wide range of applications. This guide covers the most common scenarios and provides links to additional resources. You will learn how to: -Plan your transition, survey your software stack, and understand your software dependencies. -Test, ... » read more

Shift Left The Design Process With Calibre Interactive Symmetry Checking
By Siemens EDA - 16 Oct, 2024 - Comments: 0

The traditional methods of symmetry checking are due for an update. The Calibre interactive, no code symmetry checking solution helps designers capture symmetry issues very early in the design cycle to reduce the number of iterations. Calibre interactive symmetry checking shifts left the whole verification process and reduces the time needed to reach tape out. What you’ll learn: Why the... » read more

Data Center Digital Twin Return On Investment From An Environmental Standpoint
By Cadence - 16 Oct, 2024 - Comments: 0

Data center operators face growing pressure to enhance sustainability. Understanding where inefficiencies occur is the first step toward making impactful changes. Cadence Reality DC Digital Twin helps you identify inefficiencies, implement solutions, and track improvements. This white paper reveals how Cadence Reality DC Digital Twin can save an average of 316MWh annually, delivering a retur... » read more

The Cost Of EDA Data Storage And Processing Efficiency
By Adam Kovac - 09 Oct, 2024 - Comments: 0

Engineering teams are turning to the cloud to process and store increasing amounts of EDA data, but while the compute resources in hyperscale data centers are virtually unlimited, the move can add costs, slow access to data, and raise new concerns about sustainability. For complex chip designs, the elasticity of the cloud is a huge bonus. With advanced-node chips and packaging, the amount of... » read more

Research Bits: Sept. 24
By Jesse Allen - 24 Sep, 2024 - Comments: 0

Modeling negative capacitance Researchers from Lawrence Berkeley National Laboratory developed an open-source 3D simulation framework capable of modeling the atomistic origins of negative capacitance in ferroelectric thin films at the device level. When a material has negative capacitance, it can store a greater amount of electrical charge at lower voltages. The team believes the FerroX fra... » read more

Research Bits: Sept. 17
By Jesse Allen - 17 Sep, 2024 - Comments: 0

DNA data storage plus compute Researchers from North Carolina State University and Johns Hopkins University created a DNA-based device that can perform both data storage and computing functions. “Specifically, we have created polymer structures that we call dendricolloids – they start at the microscale, but branch off from each other in a hierarchical way to create a network of nanoscal... » read more

Memory Fundamentals For Engineers
By The SE Staff - 17 Sep, 2024 - Comments: 0

Memory is one of a very few elite electronic components essential to any electronic system. Modern electronics perform extraordinarily complex duties that would be impossible without memory. Your computer obviously contains memory, but so does your car, your smartphone, your doorbell camera, your entertainment system, and any other gadget benefiting from digital electronics. This eBook prov... » read more

CXL Thriving As Memory Link
By Karen Heyman - 16 Sep, 2024 - Comments: 0

CXL is emerging from a jumble of interconnect standards as a predictable way to connect memory to various processing elements, as well as to share memory resources within a data center. Compute Express Link is built on a PCI Express foundation and supported by nearly all the major chip companies. It is used to link CPUs, GPUs, FPGAs, and other purpose-built accelerators using serial communic... » read more

Elimination Of Functional False Path During RDC Analysis
By Farhad Ahmed - 12 Sep, 2024 - Comments: 0

Reset domain crossing (RDC) issues can occur in sequential designs when the reset of a source register differs from the reset of a destination register, even if the data path is in the same clock domain. This can lead to asynchronous crossing paths and metastability at the destination register. RDC analysis on RTL designs is done to find such metastability issues in a design, which may occur du... » read more

Simulation Replay Tackles Key Verification Challenges
By Robert Ruiz - 12 Sep, 2024 - Comments: 0

Simulation lies at the heart of both verification and pre-silicon validation for every semiconductor development project. Finding functional or power problems in the bringup lab is much too late, leading to very expensive chip turns. Thorough simulation before tapeout, coupled with comprehensive coverage metrics, is the only way to avoid surprises in silicon. However, the enormous size and comp... » read more

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