category: Manufacturing, Packaging and Materials

category: IoT, Security & Automotive

Co-Design Optimization For PI/SI When Considering Thermal Performance
By Peater Wu - 21 Apr, 2025 - Comments: 0

When applications become more complex, higher data rates or high frequencies are required. However, with increasing functions, more power dissipation will be generated. Furthermore, temperature is proportional to power dissipation, so electrical performance will also depend on thermal conditions. To determine how temperature impacts power integrity/signal integrity (PI/SI), electrical simulatio... » read more

The Other Side Of The Wafer: Transistor Channel Stress In Backside Power Delivery Networks
By Sam Sarkar - 17 Apr, 2025 - Comments: 0

As transistor scaling has moved to the angstrom era (18A, 14A, etc.), the issues of interconnect resistance (IR), IR drop, and power loss are becoming more severe. Traditionally, signal lines and power lines are fabricated on the same side of the wafer as the active device. But fabricating everything on one side of the wafer can create a shortage of space and resources at the interconnect la... » read more

TCAD For GPUs And GPUs For TCAD
By Shela Aboud - 17 Apr, 2025 - Comments: 0

It is well known that many steps in chip development become exponentially harder as feature sizes shrink and instance counts balloon. Billions of transistors are now commonplace, and wafer-scale devices with trillions are on the horizon. Such massive chips put pressure on every electronic design automation (EDA) tool in the development flow, from front-end architectural modeling to signoff and ... » read more

Can Chiplets Serve Cost-Conscious Apps?
By Bryon Moyer - 17 Apr, 2025 - Comments: 0

Chiplets are emerging as a significant new phase in the evolution of the semiconductor market, providing a way to continue scaling performance well beyond the size limitations of a reticle. But that improvement comes with a high price tag and a lot more complexity, which so far has limited adoption. One of the main reasons for the cost increase is the need for advanced packaging when employi... » read more

Innovation And Collaboration In Power Module Packaging: A Thermal Perspective
By Thomas Wang - 17 Apr, 2025 - Comments: 0

Power modules are the foundation of modern electrical systems, especially within electric vehicles (xEVs), industrial motor applications, and renewable energy solutions such as wind and solar power. As the demand for more power in smaller and lighter systems grows, managing heat dissipation has become a major challenge, as the thermal energy from high current flows can lead to reliability issue... » read more

Fine-Line RDL Structure Analysis of Fan-Out Chip-on-Substrate Platform
By ASE - 17 Apr, 2025 - Comments: 0

Abstract: "The demand for high bandwidth memory (HBM) has driven the need for advanced packaging solutions, particularly those involving fan-out layers to interconnect wafers within packages. To meet the high-bandwidth requirements of the Fan-Out Chip-on-Substrate (FOCoS) technology platform, additional layers are required. However, as the number of fanout layers increases, significant chall... » read more

Backside Power Delivery Nears Production
By Laura Peters - 17 Apr, 2025 - Comments: 0

Backside power delivery is being called a game changer — a breakthrough technology and the next great enabler in CMOS scaling. It promises significant PPA advances, including faster switching, lower voltage droop, and reduced power supply noise. And it is poised to deliver these benefits below the 2nm node, despite a substantial disruption in front-end processes from lithography pattern di... » read more

Packaging With Fewer People And Better Results
By Gregory Haley - 17 Apr, 2025 - Comments: 0

Advanced packaging has evolved far beyond the simple stacking of dies and connecting of interposers. Once a passive conduit between silicon and the outside world, it has become an active component of overall device performance. In today’s multi-die assemblies, the assembly and packaging lines are expected to maintain signal integrity at multi-gigahertz frequencies, manage heat in verticall... » read more

Advanced Atomistic Simulation Techniques For Atomic Layer Etching
By Synopsys - 17 Apr, 2025 - Comments: 0

Continuous downscaling of the critical dimensions in semiconductor devices is the cornerstone of technological revolution. As the technology nodes keep shrinking, innovations in fabrication technologies are needed to continue the trend. We have arrived at the age where atomic level precision in the fabrication of semiconductor devices is needed to keep improving PPA. Thus, advanced film fabrica... » read more

Three Ways Curvy ILT Together With PLDC Improves Wafer Uniformity
By Aki Fujimura - 15 Apr, 2025 - Comments: 0

This is the second blog in a three-part series on pixel-level dose correction (PLDC). The first installment was “Improving Uniformity and Linearity for All Masks” from January 29, 2025. PLDC: A new solution for improving mask and wafer uniformity Improving mask uniformity is the easiest, cheapest way to improve wafer uniformity. Uniformity is a measure of how similarly the exact same feat... » read more

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