Challenges In Stacking, Shrinking And Inspecting Next-Gen Chips


Rick Gottscho, CTO of Lam Research, sat down with Semiconductor Engineering to discuss memory and equipment scaling, new market demands, and changes in manufacturing being driven by cost, new technologies, and the application of machine learning. What follows are excerpts of that conversation. SE: We have a lot of different memory technologies coming to market. What's the impact of that? ... » read more

High-Performance 300 kW 3-Phase SiC Inverter Based On Next Generation Modular SiC Power Modules


Wolfspeed presents a new high-performance, low-cost, compact 3-phase inverter based on next generation power modules which are specifically optimized to fully utilize Wolfspeed’s third generation of silicon carbide (SiC) MOSFETs. The inverter was designed with a holistic approach with careful consideration of module specifications, busbar technology, DC link capacitors, and a high-performance... » read more

Super Planarizing Material For Trench And Via Arrays


As device design scales and becomes more complex, fine control of patterning and transfer steps is integral. Planarization of deep trenches and via arrays has always been a challenge. Aspect ratios continue to increase while critical dimensions shrink, and typical trench fill schemes are no longer able to meet the fill and planarization requirements. Traditional design of spin-on carbon (SOC) m... » read more

Best Practices In Business Continuity Planning


Cameron Burks, head of Global Security, Enterprise Business Resiliency and Health, Environment & Safety with Adobe Systems, and a member of the White House Task Force for COVID-19 response, briefed members of SEMI’s IT Leadership (ITL) and Environment, Health & Safety (EHS) groups on April 20, 2020, on enterprise resiliency principals specific to the current COVID-19 crisis. Burk... » read more

Fan-Out Wafer-Level Packaging And Copper Electrodeposition


By Steven T. Mayer, Bryan Buckalew, and Kari Thorkelsson As integrated circuit designers bring more sophisticated chip functionality into smaller spaces, heterogeneous integration, including 3D stacking of devices, becomes an increasingly useful and cost-effective way of mixing and connecting various functional technologies. One of the heterogeneous integration platforms gaining increased ac... » read more

Consideration Of Missing Defect Suppression Technique In EUV Hole Patterning


This study focused on the defect behavior analysis with CD variation on EUV via hole pattern using photolithographic process and etch transfer performance. While defect requirements are not as stringent for memory devices, logic devices must be defect-free. Currently, a defect which comes from the process or material can only be detected by top-down inspection approach, however, it is difficult... » read more

Compute-In Memory Accelerators Up-End Network Design Tradeoffs


An explosion in the amount of data, coupled with the negative impact on performance and power for moving that data, is rekindling interest around in-memory processing as an alternative to moving data back and forth between the memory and the processor. Compute-in-memory (CIM) arrays based on either conventional memory elements like DRAM and NAND flash, as well as emerging non-volatile memori... » read more

Manufacturing Bits: May 19


Virus simulations Using an advanced building simulator and testbed, Lawrence Berkeley National Laboratory (Berkeley Lab) is launching a study of the risk of airborne transmission of viruses in buildings. Researchers will also explore the ways to mitigate those risks. The experiments will take place in Berkeley Lab’s FLEXLAB, which is an advanced building simulator. Used by builders, archi... » read more

Week In Review: Manufacturing, Test


Chipmakers TSMC has announced its intention to build and operate an advanced semiconductor fab in the U.S. The fab, to be built in Arizona, will utilize TSMC’s 5nm technology and will produce 20,000 wafers per month. TSMC’s total spending on this project will be approximately $12 billion from 2021 to 2029. Construction is planned to start in 2021 with production targeted to begin in 202... » read more

Manufacturing Bits: May 11


Covid-19 data mining Using machine learning and other technologies, Lawrence Berkeley National Laboratory (Berkeley Lab) has developed a data text-mining tool to help synthesize a growing amount of scientific literature on Covid-19. Each day, some 200 new journal articles are being published on the coronavirus alone, according to Berkeley Lab. Berkeley Lab’s data mining tool, which is liv... » read more

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