category: Manufacturing, Packaging and Materials

category: IoT, Security & Automotive

Re-Coloring ECO Changes With Calibre Multi-Patterning
By Mentor, a Siemens Business - 21 Sep, 2016 - Comments: 0

Engineering change orders (ECOs) can wreak havoc on multi-patterning (MP) coloring (and time to market) if not dealt with quickly and efficiently. Design teams working on MP designs need a complete ECO enablement solution, before recoloring issues consume resources and destroy schedules. The Calibre Multi-Patterning tool provides smart, automated support for recoloring designs after ECO impleme... » read more

Manufacturing Bits: Sept. 20
By Mark LaPedus - 20 Sep, 2016 - Comments: 0

Crystal database The University of California at San Diego and Lawrence Berkeley National Laboratory have created an open-source database of elemental crystal surfaces and shapes. The database, called Crystalium, is a new and expanding set of information about various crystals. The database can help researchers design new materials for various applications, such as batteries, catalytic conv... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 16 Sep, 2016 - Comments: 0

Chipmakers The finFET market is heating up. GlobalFoundries, Intel, Samsung and TSMC are ramping 16nm/14nm finFETs. And 10nm and 7nm finFETs are in the works. The market will shortly have a new competitor—Taiwan’s United Microelectronics Corp. (UMC). Some years ago, UMC licensed finFET technology from IBM. UMC has been a bit quiet about the 14nm finFET technology, but it has made si... » read more

7nm Market Heats Up
By Mark LaPedus - 15 Sep, 2016 - Comments: 2

The 7nm finFET market is heating up in the foundry business amid the ongoing push to develop chips at advanced nodes. Not long ago, TSMC announced plans to enter the 7nm finFET market. In addition, Intel and Samsung are also separately planning to enter the 7nm finFET race. Now, GlobalFoundries is formally announcing its 7nm finFET technology. Slated for 2018, GlobalFoundries’ 7nm fin... » read more

Stacked Die Changes
By Ed Sperling - 15 Sep, 2016 - Comments: 1

Semiconductor Engineering sat down to discuss advanced packaging with David Pan, associate professor in the department of electrical and computer engineering at the University of Texas; Max Min, senior technical manager at [getentity id="22865" e_name="Samsung"]; John Hunt, senior director of engineering at ASE; and Sitaram Arkalgud, vice president of 3D portfolio and technologies at Invensas. ... » read more

Good Filters, Poor Resists
By Katherine Derbyshire - 14 Sep, 2016 - Comments: 0

Shrinking feature sizes and more complex lithography schemes are increasing the pressure on all aspects of the lithography process, including resists and resist filtration. As Clint Haris, vice president and general manager for liquid micro contamination control at Entegris explained, fabs are pushing resist manufacturers toward more stringent control of both contaminants and “soft particl... » read more

Manufacturing Bits: Sept. 13
By Mark LaPedus - 13 Sep, 2016 - Comments: 0

Direct-write liquid litho The Department of Energy’s Oak Ridge National Laboratory has developed what could be called direct-write liquid lithography. In the lab, researchers have modified a scanning transmission electron microscope (STEM). Then, using the STEM as an e-beam tool, researchers have devised a technology that enables the direct write of tiny features in “microfabricated liq... » read more

Speeding Up Mask Production
By Mark LaPedus - 12 Sep, 2016 - Comments: 0

Chip production is becoming more complex and expensive at each node. As a result, chipmakers require a growing number of new manufacturing technologies to enable the next wave of devices at advanced nodes. In the fab, for example, the most obvious need is extreme ultraviolet ([gettech id="31045" comment="EUV"]) lithography. In addition, chipmakers also need a new class of atomic-level proces... » read more

The Week In Review: Manufacturing
By Mark LaPedus - 09 Sep, 2016 - Comments: 0

Chipmakers GlobalFoundries has rolled out its next-generation FD-SOI technology. The new 12nm FD-SOI process is called 12FDX. It is designed for a range of applications, from mobile computing and 5G connectivity to artificial intelligence and autonomous vehicles. "Some applications require the unsurpassed performance of finFET transistors, but the vast majority of connected devices need high l... » read more

Manufacturing Bits: Sept. 6
By Mark LaPedus - 06 Sep, 2016 - Comments: 0

DARPA ALD The University of Colorado at Boulder has developed an atomic layer deposition (ALD) technology that can be performed at room temperatures. The technology, dubbed electron-enhanced ALD (EE-ALD), has been developed as part of the Local Control of Materials Synthesis (LoCo) program at the U.S. Defense Advanced Research Projects Agency (DARPA). The LoCo program is developing tech... » read more

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