Blog Review: Oct. 26


Synopsys' Teng-Kiat Lee and Sandeep Mehndiratta argue that IC design in the cloud can support an existing on-prem strategy, enable large and small enterprises to manage cost and capacity more effectively, and offer security for valuable semiconductor IP. Siemens EDA's Chris Spear finds that SystemVerilog classes are a good way to encapsulate both variables and the routines that operates on t... » read more

Week In Review: Semiconductor Manufacturing, Test


Fallout from the new U.S. export controls continues. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. In addition, U.S. persons (citizens and permanent residents) are barred from supporting China’s advanced chip development or production without a license. ... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, mobility The BMW Group will invest $1.7 billion in its U.S. operations to build electric vehicles and batteries, mostly in South Carolina. BMW will drop $1 billion in its South Carolina plant for EV production and $700 million for a new battery-assembly facility in the state. BMW also agreed to purchase battery cells from Japan-based Envision AESC, which plans to construct a new ba... » read more

Week In Review: Design, Low Power


Tools and IP Electronic system design revenue hit a record $3.75 billion in the second quarter, according to a report from ESD Alliance, a SEMI Technology Community. That number represents a 17.5% year-over-year increase. Walden C. Rhines, the report’s executive sponsor, said it was the largest such jump in over a decade and that all product categories and geographic regions recorded second ... » read more

Blog Review: Oct. 19


Siemens EDA's Harry Foster examines trends related to various aspects of FPGA design and the growing design complexity associated with increasing number of embedded processor cores, asynchronous clock domains, and more safety features. Synopsys' Twan Korthorst and Kenneth Larsen take a broad look at silicon photonics, including the benefits of electronic integration, accelerating the develop... » read more

EDA, IP Revenue Way Up


EDA and semiconductor IP sales grew 17.5% to $3.75 billion in Q2, the highest growth in more than a decade, fueled by more complex designs and the need for advanced design and verification tools. Demand for nearly every segment tracked in SEMI's Electronic Design Market Data (EDMD) report was up, including services, which grew 23.2% in Q2 — the most recent statistics available in. That cou... » read more

Week In Review: Semiconductor Manufacturing, Test


The United States imposed further export controls aimed at preventing foreign firms from selling advanced chips to China or supplying Chinese firms with semiconductor processing tools. Under new regulations, companies looking to supply Chinese chipmakers with advanced manufacturing equipment (<14nm) must first obtain a license from the U.S. Department of Commerce. Officials noted that they h... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive, Mobility Hyundai announced all of its vehicles will be software-defined vehicles (SDVs) by 2025. The company said all newly launched Hyundai vehicles will be able to receive over-the-air software updates next year, and that it expects to register 20 million vehicles to its Connected Car Services system by 2025. Hyundai also said it will invest the equivalent of more than $12 billio... » read more

Week In Review: Design, Low Power


Cadence unveiled a new environment to automate and accelerate the complete design closure cycle from signoff optimization through routing, static timing analysis (STA), and extraction. The Certus Closure Solution allows concurrent, full-chip optimization through a massively parallel and distributed architecture and engine shared with Cadence’s Innovus Implementation System and the Tempus Timi... » read more

Blog Review: Oct. 12


Synopsys' Richard Solomon, Madhumita Sanyal, and Gary Ruggles take a look at the possibilities that CXL 3.0 can bring to a variety of data-driven applications that demand increasingly higher levels of memory capacity, with higher bandwidth, more security, and lower latency. Siemens EDA's Rich Edelman provides some tips for debugging UVM testbenches, such as how to determine what line changed... » read more

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