Power Is Limiting Machine Learning Deployments

By Brian Bailey - 16 Jul, 2019 - Comments: 2

The total amount of power consumed for machine learning tasks is staggering. Until a few years ago we did not have computers powerful enough to run many of the algorithms, but the repurposing of the GPU gave the industry the horsepower that it needed. The problem is that the GPU is not well suited to the task, and most of the power consumed is waste. While machine learning has provided many ... » read more

5nm Vs. 3nm

By Mark LaPedus - 24 Jun, 2019 - Comments: 15

Foundry vendors are readying the next wave of advanced processes, but their customers will face a myriad of confusing options—including whether to develop chips at 5nm, wait until 3nm, or opt for something in between. The path to 5nm is well-defined compared with 3nm. After that, the landscape becomes more convoluted because foundries are adding half-node processes to the mix, such as 6nm ... » read more

Why Chips Are Getting Noisier

By Brian Bailey - 13 Jun, 2019 - Comments: 0

In the past, designers only had to worry about noise for sensitive analog portions of a design. Digital circuitry was immune. But while noise gets worse at newer process nodes, staying at 28nm does not mean that it can be ignored anymore. With Moore's Law slowing, designs have to do more with less. Margins are being squeezed, additional concurrency is added, and attempts are made to opti... » read more

Data Confusion At The Edge

By Ed Sperling - 11 Jun, 2019 - Comments: 0

Disparities in pre-processing of data at the edge, coupled with a total lack of standardization, are raising questions about how that data will be prioritized and managed in AI and machine learning systems. Initially, the idea was that 5G would connect edge data to the cloud, where massive server farms would infer patterns from that data and send it back to the edge devices. But there is far... » read more

3D NAND Race Faces Huge Tech And Cost Challenges

By Mark LaPedus - 23 May, 2019 - Comments: 8

Amid the ongoing memory downturn, 3D NAND suppliers continue to race each other to the next technology generations with several challenges and a possible shakeout ahead. Micron, Samsung, SK Hynix and the Toshiba-Western Digital duo are developing 3D NAND products at the next nodes on the roadmap, but the status of two others, Intel and China’s Yangtze Memory Technologies Co. (YMTC), is les... » read more

Chiplet Momentum Builds, Despite Tradeoffs

By Brian Bailey - 13 May, 2019 - Comments: 0

Chip design is a series of tradeoffs. Some are technical, others are related to cost, competitive features or legal restrictions. But with the nascent 'chiplet' market, many of the established balance points are significantly altered, depending on market segments and ecosystem readiness. Chiplets provide an alternative mechanism for integrating intellectual property (IP) blocks into a semico... » read more

5G Heats Up Base Stations

By Kevin Fogarty - 07 May, 2019 - Comments: 0

Before 5G can be deployed commercially on a large scale, engineers have to solve some stubborn problems—including how to make a hot technology a whole lot cooler. 5G-capable modem chipsets are already on the market from Qualcomm, Samsung, Huawei, MediaTek, Intel and Apple, with some 5G service (LTE-Advanced/LTE-Advanced Pro) available in the U.S. But still mostly missing from the 5G equati... » read more

The Case For Embedded FPGAs Strengthens And Widens

By Brian Bailey - 25 Apr, 2019 - Comments: 2

The embedded FPGA, an IP core integrated into an ASIC or SoC, is winning converts. System architects are starting to see the benefits of eFPGAs, which offer the flexibility of programmable logic without the cost of FPGAs. Programmable logic is especially appealing for accelerating machine learning applications that need frequent updates. An eFPGA can provide some architects the cover they ne... » read more

Controlling IC Manufacturing Processes For Yield

By Ed Sperling - 24 Apr, 2019 - Comments: 0

Equipment and tools vendors are starting to focus on data as a means of improving yield, adding more sensors and analysis capabilities into the manufacturing flow to circumvent problems in real time. How much this will impact the cost of developing complex chips at leading-edge nodes, and in 2.5D and 3D-IC packages, remains to be seen. But the race to both generate data during manufacturing ... » read more

Single Vs. Multi-Patterning EUV

By Mark LaPedus - 25 Mar, 2019 - Comments: 2

Extreme ultraviolet (EUV) lithography finally is moving into production, but foundry customers now must decide whether to implement their designs using EUV-based single patterning at 7nm, or whether to wait and instead deploy EUV multiple patterning at 5nm. Each patterning scheme has unique challenges, making that decision more difficult than it might appear. Targeted for 7nm, single pattern... » read more

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category: Special Reports

category: IoT, Security & Automotive

Power Is Limiting Machine Learning Deployments

5nm Vs. 3nm

Why Chips Are Getting Noisier

Data Confusion At The Edge

3D NAND Race Faces Huge Tech And Cost Challenges

Chiplet Momentum Builds, Despite Tradeoffs

5G Heats Up Base Stations

The Case For Embedded FPGAs Strengthens And Widens

Controlling IC Manufacturing Processes For Yield

Single Vs. Multi-Patterning EUV

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