The Rising Price Of Power In Chips


Power is everything when it comes to processing and storing data, and much of it isn't good. Power-related issues, particularly heat, dominate chip and system designs today, and those issues are widening and multiplying. Transistor density has reached a point where these tiny digital switches are generating more heat than can be removed through traditional means. That may sound manageable e... » read more

Backside Power Delivery Gears Up For 2nm Devices


The top three foundries plan to implement backside power delivery as soon as the 2nm node, setting the stage for faster and more efficient switching in chips, reduced routing congestion, and lower noise across multiple metal layers. The benefits of using this approach are significant. By delivering power using slightly fatter, less resistive lines on the backside, rather than inefficient fro... » read more

SRAM Scaling Issues, And What Comes Next


The inability of SRAM to scale has challenged power and performance goals forcing the design ecosystem to come up with strategies that range from hardware innovations to re-thinking design layouts. At the same time, despite the age of its initial design and its current scaling limitations, SRAM has become the workhorse memory for AI. SRAM, and its slightly younger cousin DRAM, have always co... » read more

Chip Ecosystem Apprenticeships Help Close The Talent Gap


Competency-based apprenticeship programs are gaining wider acceptance across the chip industry as companies and governments look for new ways to address talent shortages, and as workers look for new skills that can span multiple industry sectors and industries. Funded in part by the CHIPS Act in the U.S. the European Chips Act, and various other nation-specific and regional programs, apprent... » read more

Why There Are Still No Commercial 3D-ICs


Building chips in three dimensions is drawing increased attention and investment, but so far there have been no announcements about commercial 3D-IC chips. There are some fundamental problems that must be overcome and new tools that need to be developed. In contrast, the semiconductor industry is becoming fairly comfortable with 2.5D integration, where individual dies are assembled on some k... » read more

Many More Hurdles In Heterogeneous Integration


Advanced packaging options continue to stack up in the pursuit of “More than Moore” and higher levels of integration. It has become a place where many high-density interconnects converge, and where many new and familiar problems need to be addressed. The industry’s first foray into fine-pitch multi-die packaging utilized silicon interposers with through-silicon vias (TSVs) to deliver s... » read more

Glitch Power Issues Grow At Advanced Nodes


An estimated 20% to 40% of total power is being wasted due to glitch in some of the most advanced and complex chip designs, and at this point there is no single best approach for how and when to address it, and mixed information about how effective those solutions can be. Glitch power is not a new phenomenon. DSP architects and design engineers are well-versed in the power wasted by long, sl... » read more

Money Pours Into New Fabs And Facilities


Fabs, packaging, test and assembly, and R&D all drew major funding in 2023. Companies poured money into offshore locations, such as India and Malaysia, to access a larger workforce and lower costs, while also partnering with governments to secure domestic supply chains amid ongoing geopolitical turmoil. Looking ahead, artificial intelligence (AI), quantum computing, and data applications... » read more

Proprietary Vs. Commercial Chiplets


Large chipmakers are focusing on chiplets as the best path forward for integrating more functions into electronic devices. The challenge now is how to pull the rest of the chip industry along, creating a marketplace for third-party chiplets that can be chosen from a menu using specific criteria that can speed time to market, help to control costs, and behave as reliably as chiplets developed in... » read more

Closing The Test And Metrology Gap In 3D-IC Packages


The industry is investing in more precise and productive inspection and testing to enable advanced packages and eventually, 3D ICs. The next generations of aerospace, automotive, smartphone, and wearable tech most likely will be powered by multiple layers of intricately connected silicon, a stark departure from the planar landscapes of traditional integrated circuits. These 3D-ICs, compos... » read more

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