Optimization of Oxygen Plasma Conditions for Cu-Cu Bonding


A new technical paper titled "Understanding and Optimizing Oxygen Plasma Treatment for Enhanced Cu-Cu Bonding Application" was published by researchers at Seoul National University of Science and Technology. Abstract "This study investigates the optimization of O2 plasma treatment conditions to enhance Cu-Cu bonding. The O2 plasma treatment conditions were optimized using Design of Experime... » read more

Indium Tungsten Oxide (IWO) Thin-Film Transistors


A new technical paper titled "Thermally Dependent Metastability of Indium-Tungsten-Oxide Thin-Film Transistors" was published by researchers at Rochester Institute of Technology and Corning Research and Development Corporation. Abstract "Indium tungsten oxide (IWO) has been investigated as an oxide semiconductor candidate for next-generation thin-film transistors (TFTs). Bottom-gate TFTs we... » read more

Optimization of the Inter-Chiplet Interconnect And The Chiplet Placement (ETH Zurich, U. of Bologna)


A new technical paper titled "PlaceIT: Placement-based Inter-Chiplet Interconnect Topologies" was published by researchers at ETH Zurich and University of Bologna. Abstract "2.5D integration technology is gaining traction as it copes with the exponentially growing design cost of modern integrated circuits. A crucial part of a 2.5D stacked chip is a low-latency and high-throughput inter-ch... » read more

Indium Nitrate As An Advanced Metal-Oxide Resist for EUV Lithography


A new technical paper titled "Sensitivity and contrast of indium nitrate hydrate resist evaluated by low-energy electron beam and extreme ultraviolet exposure" was published by researchers at UT Dallas. "We evaluate the sensitivity and contrast of indium nitrate resists by analyzing dose curves collected using electron beam lithography (EBL) and extreme ultraviolet (EUV) exposure, " states t... » read more

Mixed-Precision DL Inference, Co-Designed With HW Accelerator DPU (Intel)


A new technical paper titled "StruM: Structured Mixed Precision for Efficient Deep Learning Hardware Codesign" was published by Intel. Abstract "In this paper, we propose StruM, a novel structured mixed-precision-based deep learning inference method, co-designed with its associated hardware accelerator (DPU), to address the escalating computational and memory demands of deep learning worklo... » read more

Processing-Using-DRAM: Attaining High-Performance Via Dynamic Precision Bit-Serial Arithmetic (ETH Zurich, et al.)


A new technical paper titled "Proteus: Achieving High-Performance Processing-Using-DRAM via Dynamic Precision Bit-Serial Arithmetic" was published by researchers at ETH Zurich, Cambridge University, Universidad de Córdoba, Univ. of Illinois Urbana-Champaign and NVIDIA Research. Abstract "Processing-using-DRAM (PUD) is a paradigm where the analog operational properties of DRAM structures ... » read more

HW Security: Pager, Walkie-talkie And Other Battery-Power System Attacks (U. of Florida)


A new technical paper titled "When Everyday Devices Become Weapons: A Closer Look at the Pager and Walkie-talkie Attacks" was published by researchers at University of Florida. Abstract "Battery-powered technologies like pagers and walkie-talkies have long been integral to civilian and military operations. However, the potential for such everyday devices to be weaponized has largely been un... » read more

Apple CPU Attacks: SLAP and FLOP (Georgia Tech, Ruhr University Bochum)


Two technical papers were published by researchers at Georgia Tech and Ruhr University Bochum detailing CPU side-channel attack vulnerabilities on Apple devices that could reveal confidential data. FLOP: Breaking the Apple M3 CPU via False Load Output Predictions"  Authors: Jason Kim, Jalen Chuang, Daniel Genkin and Yuval Yarom 2025. "We present FLOP, another speculative execution att... » read more

Ultranarrow Semiconductor WS2 Nanoribbon FETs (Chalmers)


A new technical paper titled "Ultranarrow Semiconductor WS2 Nanoribbon Field-Effect Transistors" was published by researchers at Chalmers University of Technology. Abstract "Semiconducting transition metal dichalcogenides (TMDs) have attracted significant attention for their potential to develop high-performance, energy-efficient, and nanoscale electronic devices. Despite notable advancem... » read more

Topology And Connection Architecture Of CXL Pooling Systems (Microsoft, Columbia)


A new technical paper titled "Octopus: Scalable Low-Cost CXL Memory Pooling" was published by researchers at University of Washington, Microsoft Azure and Columbia University. Abstract "Compute Express Link (CXL) is widely-supported interconnect standard that promises to enable memory disaggregation in data centers. CXL allows for memory pooling, which can be used to create a shared memory ... » read more

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