category: Architectures

category: IoT, Security & Automotive

Implementing Fast Barriers For A Shared-Memory Cluster Of 1024 RISC-V Cores
By Technical Paper Link - 27 Jul, 2023 - Comments: 0

A technical paper titled “Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster” was published by researchers at ETH Zürich and Università di Bologna. "Synchronization is likely the most critical performance killer in shared-memory parallel programs. With the rise of multi-core and many-core processors, the relative impact on performance and energy overhe... » read more

RISC-V Open Platform for Next-Gen Automotive ECUs (ETH Zurich, Huawei)
By Technical Paper Link - 27 Jul, 2023 - Comments: 0

A technical paper titled “Towards a RISC-V Open Platform for Next-generation Automotive ECUs” was published by researchers at ETH Zurich and Huawei Research Center (Italy). Abstract: "The complexity of automotive systems is increasing quickly due to the integration of novel functionalities such as assisted or autonomous driving. However, increasing complexity poses considerable challenges... » read more

NoC Obfuscation For Protecting Against Reverse Engineering Attacks (U. Of Florida)
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "ObNoCs: Protecting Network-on-Chip Fabrics Against Reverse-Engineering Attacks" was published by researchers at University of Florida. Abstract: "Modern System-on-Chip designs typically use Network-on-Chip (NoC) fabrics to implement coordination among integrated hardware blocks. An important class of security vulnerabilities involves a rogue foundry reverse-engineeri... » read more

A Practical DRAM-Based Multi-Level PIM Architecture For Data Analytics
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics" was published by researchers at Korea Advanced Institute of Science & Technology (KAIST) and SK hynix Inc. Abstract: "Processing-in-memory (PIM) architecture is an inherent match for data analytics application, but we observe major challenges to address when accelerating it usi... » read more

A Chiplet-Based Supercomputer For Generative LLMs That Optimizes Total Cost of Ownership
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Chiplet Cloud: Building AI Supercomputers for Serving Large Generative Language Models" was published by researchers at University of Washington and University of Sydney. Abstract: "Large language models (LLMs) such as ChatGPT have demonstrated unprecedented capabilities in multiple AI tasks. However, hardware inefficiencies have become a significant factor limiting ... » read more

Analog On-Chip Learning Circuits In Mixed-Signal Neuromorphic SNNs
By Technical Paper Link - 20 Jul, 2023 - Comments: 0

A technical paper titled "Neuromorphic analog circuits for robust on-chip always-on learning in spiking neural networks" was published by researchers at Institute of Neuroinformatics, University of Zurich, and ETH Zurich. Abstract: "Mixed-signal neuromorphic systems represent a promising solution for solving extreme-edge computing tasks without relying on external computing resources. Their s... » read more

DW-MTJ Devices For Noise-Resilient Networks For Neuromorphic Computing On The Edge
By Technical Paper Link - 08 Jul, 2023 - Comments: 0

A technical paper titled "Stochastic domain wall-magnetic tunnel junction artificial neurons for noise-resilient spiking neural networks" was published by researchers at University of Texas at Austin. Abstract: "The spatiotemporal nature of neuronal behavior in spiking neural networks (SNNs) makes SNNs promising for edge applications that require high energy efficiency. To realize SNNs in har... » read more

An Advanced Modeling Approach For Cyclic Safety Mechanisms In A Fault Tree Analysis
By Technical Paper Link - 08 Jul, 2023 - Comments: 0

A technical paper titled "Best Practices for Advanced Modeling of Safety Mechanisms in an FTA" was published by researchers at University of Stuttgart, Robert Bosch GmbH, Audi AG, and Porsche AG. Abstract: "To cope with the megatrends electrification, automated driving, and connectivity, new functionalities and electric and/or electronic systems must be developed, which require a safe power s... » read more

Heterogeneous Integration As A Path Towards Sustainable Computing, Using Chiplets
By Technical Paper Link - 06 Jul, 2023 - Comments: 0

A technical paper titled "Towards Sustainable Computing: Assessing the Carbon Footprint of Heterogeneous Systems" was published by researchers at Arizona State University and University of Minnesota. Abstract: "Decades of progress in energy-efficient and low-power design have successfully reduced the operational carbon footprint in the semiconductor industry. However, this has led to an incre... » read more

Leveraging Large Language Models (LLMs) To Perform SW-HW Co-Design
By Technical Paper Link - 28 Jun, 2023 - Comments: 0

A technical paper titled “On the Viability of using LLMs for SW/HW Co-Design: An Example in Designing CiM DNN Accelerators” was published by researchers at University of Notre Dame. Abstract: "Deep Neural Networks (DNNs) have demonstrated impressive performance across a wide range of tasks. However, deploying DNNs on edge devices poses significant challenges due to stringent power and com... » read more

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