Sibyl, a lightweight, reinforcement learning-based data placement technique for hybrid storage systems (ETH Zurich)


New research paper titled "Sibyl: Adaptive and Extensible Data Placement in Hybrid Storage Systems Using Online Reinforcement Learning" from researchers at ETH Zurich, Eindhoven University of Technology, and LIRMM, Univ. Montpellier, CNRS. Abstract "Hybrid storage systems (HSS) use multiple different storage devices to provide high and scalable storage capacity at high performance. Recent r... » read more

MEMprop: Gradient-based Learning To Train Fully Memristive SNNs


New technical paper titled "Gradient-based Neuromorphic Learning on Dynamical RRAM Arrays" from IEEE researchers. Abstract "We present MEMprop, the adoption of gradient-based learning to train fully memristive spiking neural networks (MSNNs). Our approach harnesses intrinsic device dynamics to trigger naturally arising voltage spikes. These spikes emitted by memristive dynamics are anal... » read more

TU Dresden: Tile-based Multi-Core Architecture for Heterogeneous RISC-V Processors Suitable for FPGA Platforms


New technical paper titled "AGILER: An Adaptive Heterogeneous Tile-Based Many-Core Architecture for RISC-V Processors" from researchers at Technische Universitaet Dresden (TU Dresden). Partial Abstract: "In this work, AGILER is proposed as an adaptive tile-base many-core architecture for heterogeneous RISC-V based processors. The proposed architecture consists of modular and adaptable heter... » read more

End to End System Design for DRAM-based TRNG


Research paper titled "DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators" is presented from researchers at TOBB University of Economics and Technology and ETH Zurich. Abstract "Random number generation is an important task in a wide variety of critical applications including cryptographic algorithms, scientific simulations, and industrial testing tools. True ... » read more

Designing Hardware Accelerators Using A Data-Driven Approach


Research paper titled "Data-Driven Offline Optimization For Architecting Hardware Accelerators" by researchers at Google Research and UC Berkeley. Abstract "Industry has gradually moved towards application-specific hardware accelerators in order to attain higher efficiency. While such a paradigm shift is already starting to show promising results, designers need to spend considerable man... » read more

OTA On-Chip Computing That Conquers A Bottleneck In Wired NoC Architectures


New research paper titled "Wireless On-Chip Communications for Scalable In-memory Hyperdimensional Computing" from researchers at IBM Research, Zurich Switzerland and Universitat Politecnica de Catalunya, Barcelona, Spain Abstract: "Hyperdimensional computing (HDC) is an emerging computing paradigm that represents, manipulates, and communicates data using very long random vectors (aka hyp... » read more

Flexible Microprocessors (FlexiCores)- Natively flexible 4-bit and 8-bit microprocessors optimized for low footprint and yield


New research paper titled "FlexiCores: low footprint, high yield, field reprogrammable flexible microprocessors" from researchers at University of Illinois and PragmatIC Semiconductor. Abstract "Flexible electronics is a promising approach to target applications whose computational needs are not met by traditional silicon-based electronics due to their conformality, thinness, or cost requir... » read more

End-to-End System for Object Localization By Coupling pMUTs to a Neuromorphic RRAM-based Computational Map


New research paper titled "Neuromorphic object localization using resistive memories and ultrasonic transducers" from researchers at CEA, LETI, Université Grenoble Alpes and others. Abstract "Real-world sensory-processing applications require compact, low-latency, and low-power computing systems. Enabled by their in-memory event-driven computing abilities, hybrid memristive-Complementary... » read more

Deep Reinforcement Learning to Dynamically Configure NoC Resources


New research paper titled "Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energy-Efficient Computing Systems" from Md Farhadur Reza at Eastern Illinois University. Find the open access technical paper here. Published June 2022. M. F. Reza, "Deep Reinforcement Learning Enabled Self-Configurable Networks-on-Chip for High-Performance and Energ... » read more

ETH Zurich: PIM (Processing In Memory) Architecture, UPMEM & PrIM Benchmarks


New paper technical titled "Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture" led by researchers at ETH Zurich. Researchers provide a comprehensive analysis of the first publicly-available real-world PIM architecture, UPMEM, and introduce PrIM (Processing-In-Memory benchmarks), a benchmark suite of 16 workloads from different application domai... » read more

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