A Full-Stack Domain-Specific Overlay Generation Framework Verified On FPGA


A new technical paper titled “OverGen: Improving FPGA Usability through Domain-specific Overlay Generation” by researchers at UCLA and Chinese Academy of Sciences.

“Our essential idea is to develop a hardware generation framework targeting a highly-customizable overlay, so that the abstraction gap can be lowered by tuning the design instance to applications of interest. We leverage and extend prior work on customizable spatial architectures, SoC generation, accelerator compilers, and design space explorers to create an end-to-end FPGA acceleration system. Our novel techniques address inefficient networks between on-chip memories and processing elements, as well as improving DSE by reducing the amount of recompilation required,” states the paper.

Find the technical paper here. The paper was presented at the 55th IEEE/ACM International Symposium on Microarchitecture (MICRO 2022) and was a runner-up for a best paper award.

Sihao Liu, Jian Weng, Dylan Kupsh, Atefeh Sohrabizadeh, Zhengrong Wang, Licheng Guo (University of California, Los Angeles); Jiuyang Liu (Huazhong University of Science and Technology); Maxim Zhulin, Rishabh Mani (University of California, Los Angeles); Lucheng Zhang (Institute of Software, Chinese Academy of Sciences); Jason Cong, Tony Nowatzki (University of California, Los Angeles).

Leave a Reply

(Note: This name will be displayed publicly)