category: Architectures

category: IoT, Security & Automotive

Lower Energy, High Performance LLM on FPGA Without Matrix Multiplication
By Technical Paper Link - 27 Jun, 2024 - Comments: 0

A new technical paper titled "Scalable MatMul-free Language Modeling" was published by UC Santa Cruz, Soochow University, UC Davis, and LuxiTech. Abstract "Matrix multiplication (MatMul) typically dominates the overall computational cost of large language models (LLMs). This cost only grows as LLMs scale to larger embedding dimensions and context lengths. In this work, we show that MatMul... » read more

Dedicated Approximate Computing Framework To Efficiently Compute PCs On Hardware
By Technical Paper Link - 20 Jun, 2024 - Comments: 0

A technical paper titled “On Hardware-efficient Inference in Probabilistic Circuits” was published by researchers at Aalto University and UCLouvain. Abstract: "Probabilistic circuits (PCs) offer a promising avenue to perform embedded reasoning under uncertainty. They support efficient and exact computation of various probabilistic inference tasks by design. Hence, hardware-efficient compu... » read more

Rowhammer Bit Flips On A High-End RISC-V CPU (ETH Zurich)
By Technical Paper Link - 13 Jun, 2024 - Comments: 0

A new technical paper titled "RISC-H: Rowhammer Attacks on RISC-V" was published by researchers at ETH Zurich.  RISC-H will be presented at DRAMSec (co-located with ISCA 2024) Abstract: "The first high-end RISC-V CPU with DDR4 support has been released just a few months ago. There are currently no Rowhammer studies on RISC-V devices and it is unclear whether it is possible to compromise ... » read more

KAN: Kolmogorov Arnold Networks: An Alternative To MLPs (MIT, CalTech, et al.)
By Technical Paper Link - 13 Jun, 2024 - Comments: 0

A new technical paper titled "KAN: Kolmogorov-Arnold Networks" was published by researchers at MIT, CalTech, Northeastern University and The NSF Institute for Artificial Intelligence and Fundamental Interactions. Abstract: "Inspired by the Kolmogorov-Arnold representation theorem, we propose Kolmogorov-Arnold Networks (KANs) as promising alternatives to Multi-Layer Perceptrons (MLPs). While... » read more

Efficient TNN Inference on RISC-V Processing Cores With Minimal HW Overhead
By Technical Paper Link - 10 Jun, 2024 - Comments: 0

A new technical paper titled "xTern: Energy-Efficient Ternary Neural Network Inference on RISC-V-Based Edge Systems" was published by researchers at ETH Zurich and Universita di Bologna. Abstract "Ternary neural networks (TNNs) offer a superior accuracy-energy trade-off compared to binary neural networks. However, until now, they have required specialized accelerators to realize their effic... » read more

CAM-Based CMOS Implementation Of Reference Frames For Neuromorphic Processors (Carnegie Mellon U.)
By Technical Paper Link - 31 May, 2024 - Comments: 0

A technical paper titled “NeRTCAM: CAM-Based CMOS Implementation of Reference Frames for Neuromorphic Processors” was published by researchers at Carnegie Mellon University. Abstract: "Neuromorphic architectures mimicking biological neural networks have been proposed as a much more efficient alternative to conventional von Neumann architectures for the exploding compute demands of AI work... » read more

A HW-Aware Scalable Exact-Attention Execution Mechanism For GPUs (Microsoft)
By Technical Paper Link - 21 May, 2024 - Comments: 0

A technical paper titled “Lean Attention: Hardware-Aware Scalable Attention Mechanism for the Decode-Phase of Transformers” was published by researchers at Microsoft. Abstract: "Transformer-based models have emerged as one of the most widely used architectures for natural language processing, natural language generation, and image generation. The size of the state-of-the-art models has in... » read more

Ferroelectric Memory-Based IMC for ML Workloads
By Technical Paper Link - 21 May, 2024 - Comments: 0

A new technical paper titled "Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloads" was published by researchers at Purdue University. Abstract "This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) elements to accelerate mach... » read more

DRAM Microarchitectures And Their Impacts On Activate-Induced Bitflips Such As RowHammer 
By Technical Paper Link - 19 May, 2024 - Comments: 0

A technical paper titled “DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands” was published by researchers at Seoul National University and University of Illinois at Urbana-Champaign. Abstract: "The demand for precise information on DRAM microarchitectures and error characteristics has surged, driven by the need to explore processing in memory, enh... » read more

Competitive Open-Source EDA Tools
By Technical Paper Link - 19 May, 2024 - Comments: 0

A technical paper titled “Basilisk: Achieving Competitive Performance with Open EDA Tools on an Open-Source Linux-Capable RISC-V SoC” was published by researchers at ETH Zurich and University of Bologna. Abstract: "We introduce Basilisk, an optimized application-specific integrated circuit (ASIC) implementation and design flow building on the end-to-end open-source Iguana system-on-chip (... » read more

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