Modeling And Analyzing Open-Source SoCs For Low-Power Cyber-Physical Systems


A technical paper titled “TOP: Towards Open & Predictable Heterogeneous SoCs” was published by researchers at University of Bologna, ETH Zurich, and University of California San Diego. Abstract: "Ensuring predictability in modern real-time Systems-on-Chip (SoCs) is an increasingly critical concern for many application domains such as automotive, robotics, and industrial automation. An... » read more

Evaluation of Cache Replacement Policies Using Various Typical Simulation Approaches


A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven. Abstract: "Accurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often not... » read more

Generating And Evaluating HW Verification Assertions From Design Specifications Via Multi-LLMs


A technical paper titled “AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs” was published by researchers at Hong Kong University of Science and Technology. Abstract: "Assertion-based verification (ABV) is a critical method for ensuring design circuits comply with their architectural specifications, which are typically describe... » read more

HW/SW Techniques To Regulate Supply Voltage And Clock Frequency Of Intermittently-Computing Devices


A technical paper titled “Dynamic Voltage and Frequency Scaling for Intermittent Computing” was published by researchers at Politecnico di Milano, Georgia Institute of Technology, Lahore University of Management Sciences, and Uppsala University. Abstract: "We present hardware/software techniques to intelligently regulate supply voltage and clock frequency of intermittently-computing devic... » read more

Analysis Of Accel-Sim GPGPU Simulator And Model Improvements


A technical paper titled “Analyzing and Improving Hardware Modeling of Accel-Sim” was published by researchers at Universitat Politècnica de Catalunya. Abstract: "GPU architectures have become popular for executing general-purpose programs. Their many-core architecture supports a large number of threads that run concurrently to hide the latency among dependent instructions. In modern GPU... » read more

System For Composing Hardware Generators (Cornell Univ.)


A technical paper titled “Correct and Compositional Hardware Generators” was published by researchers at Cornell University. Abstract: "Hardware generators help designers explore families of concrete designs and their efficiency trade-offs. Both parameterized hardware description languages (HDLs) and higher-level programming models, however, can obstruct composability. Different concrete ... » read more

Design Space Simulator Of Distributed Multi-Chiplet Manycore Architectures For Comm-Intensive Applications


A technical paper titled “Muchisim: A Simulation Framework for Design Exploration of Multi-Chip Manycore Systems” was published by researchers at Princeton University. Abstract: "Current design-space exploration tools cannot accurately evaluate communication-intensive applications whose execution is data-dependent (e.g., graph analytics and sparse linear algebra) on scale-out manycore sys... » read more

Rapid Prototyping For Emerging Semiconductor Devices


A technical paper titled “Generating Predictive Models for Emerging Semiconductor Devices” was published by researchers at TU Darmstadt and NaMLab. Abstract: "Circuit design requires fast and scalable models which are compatible to modern electronic design automation tools. For this task typically analytical compact models are preferred. However, for emerging device concepts with altered ... » read more

Environmentally Sustainable FPGAs (Notre Dame, Univ. of Pittsburgh)


A new technical paper titled "REFRESH FPGAs: Sustainable FPGA Chiplet Architectures" was published by University of Notre Dame and University of Pittsburgh. Abstract "There is a growing call for greater amounts of increasingly agile computational power for edge and cloud infrastructure to serve the computationally complex needs of ubiquitous computing devices. Thus, an important challenge i... » read more

Hardware Fuzzing With MAB Algorithms


A technical paper titled “MABFuzz: Multi-Armed Bandit Algorithms for Fuzzing Processors” was published by researchers at Texas A&M University and Technische Universitat Darmstadt. Abstract: "As the complexities of processors keep increasing, the task of effectively verifying their integrity and security becomes ever more daunting. The intricate web of instructions, microarchitectural ... » read more

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