Memory System Benchmarking, Simulation, And Application Profiling Via A Memory Stress Framework

A technical paper titled “A Mess of Memory System Benchmarking, Simulation and Application Profiling” was published by researchers at Barcelona Supercomputing Center, Unversitat Politecnica de Catalunya, and Micron Technology (Italy). Abstract: "The Memory stress (Mess) framework provides a unified view of the memory system benchmarking, simulation and application profiling. The Mess benc... » read more

Ferroelectric Memory-Based IMC for ML Workloads

A new technical paper titled "Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloads" was published by researchers at Purdue University. Abstract "This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) elements to accelerate mach... » read more

DRAM Microarchitectures And Their Impacts On Activate-Induced Bitflips Such As RowHammer 

A technical paper titled “DRAMScope: Uncovering DRAM Microarchitecture and Characteristics by Issuing Memory Commands” was published by researchers at Seoul National University and University of Illinois at Urbana-Champaign. Abstract: "The demand for precise information on DRAM microarchitectures and error characteristics has surged, driven by the need to explore processing in memory, enh... » read more

A Design And Benchmarking Study Of CAM At 7nm In The Context Of Similarity Search Applications (Georgia Tech)

A technical paper titled “Cross-layer Modeling and Design of Content Addressable Memories in Advanced Technology Nodes for Similarity Search” was published by researchers at the Georgia Institute of Technology. Abstract: "In this paper we present a comprehensive design and benchmarking study of Content Addressable Memory (CAM) at the 7nm technology node in the context of similarity search... » read more

Centauri: Practical Rowhammer Fingerprinting Demonstrated On DRAM Modules (UC Davis)

A technical paper titled “Centauri: Practical Rowhammer Fingerprinting” was published by researchers at UC Davis. Abstract: "Fingerprinters leverage the heterogeneity in hardware and software configurations to extract a device fingerprint. Fingerprinting countermeasures attempt to normalize these attributes such that they present a uniform fingerprint across different devices or present d... » read more

Memristor Crossbar Architecture for Encryption, Decryption and More

A new technical paper titled "Tunable stochastic memristors for energy-efficient encryption and computing" was published by researchers at Seoul National University, Sandia National Laboratories, Texas A&M University and Applied Materials. Abstract "Information security and computing, two critical technological challenges for post-digital computation, pose opposing requirement... » read more

Feasibility and Potential of Quantum Computing For a Typical EDA Optimization Problem

A new technical paper titled "QCEDA: Using Quantum Computers for EDA" was published by researchers at Fraunhofer IESE, RPTU Kaiserslautern, DLR (Germany), and OTH Regensburg. Abstract "The field of Electronic Design Automation (EDA) is crucial for microelectronics, but the increasing complexity of Integrated Circuits (ICs) poses challenges for conventional EDA: Corresponding problems are of... » read more

Using Palladium To Address Contact Issues Of Buried Oxide Thin Film Transistors

A new technical paper titled "Approach to Low Contact Resistance Formation on Buried Interface in Oxide Thin-Film Transistors: Utilization of Palladium-Mediated Hydrogen Pathway" was published by researchers at Tokyo Institute of Technology and National Institute for Materials Science (NIMS). Abstract "Amorphous oxide semiconductors (AOSs) with low off-currents and processing temperatures... » read more

Low-Overhead Fault-Tolerant Quantum Memory (IBM)

A new technical paper titled "High-threshold and low-overhead fault-tolerant quantum memory" was published by researchers at IBM Quantum. Abstract "The accumulation of physical errors prevents the execution of large-scale algorithms in current quantum computers. Quantum error correction promises a solution by encoding k logical qubits onto a larger number n of physical qubits, such t... » read more

Scalable Verification of Memory Consistency (Purdue University)

A new technical paper titled "QED: Scalable Verification of Hardware Memory Consistency" was published by researchers at Purdue University. Abstract "Memory consistency model (MCM) issues in out-of-order-issue microprocessor-based shared-memory systems are notoriously non-intuitive and a source of hardware design bugs. Prior hardware verification work is limited to in-order-issue processors... » read more

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