category: Memory

category: IoT, Security & Automotive

SRAM With Mixed Signal Logic With Noise Immunity in 3nm Nanosheet (IBM)
By Technical Paper Link - 24 Jan, 2025 - Comments: 0

A new technical paper titled "SRAM and Mixed-Signal Logic With Noise Immunity in 3nm Nano-Sheet Technology" was published by researchers at IBM T. J. Watson Research Center and IBM. Abstract "A modular 4.26Mb SRAM based on a 82Kb/block structure with mixed signal logic is fabricated, characterized, and demonstrated with full functionality in a 3nm nanosheet (NS) technology. Designed macros ... » read more

Analog Accelerator For AI/ML Training Workloads Using Stochastic Gradient Descent (Imperial College London)
By Technical Paper Link - 24 Jan, 2025 - Comments: 0

A new technical paper titled "Learning in Log-Domain: Subthreshold Analog AI Accelerator Based on Stochastic Gradient Descent" was published by researchers at Imperial College London. Abstract "The rapid proliferation of AI models, coupled with growing demand for edge deployment, necessitates the development of AI hardware that is both high-performance and energy-efficient. In this paper, w... » read more

New Class Of Memory: Managed-Retention Memory or MRM (Microsoft Research)
By Technical Paper Link - 22 Jan, 2025 - Comments: 0

A new technical paper titled "Managed-Retention Memory: A New Class of Memory for the AI Era" was published by researchers at Microsoft. Abstract "AI clusters today are one of the major uses of High Bandwidth Memory (HBM). However, HBM is suboptimal for AI workloads for several reasons. Analysis shows HBM is overprovisioned on write performance, but underprovisioned on density and read band... » read more

Impact of Extremely Low Temperatures On The 5nm SRAM Array Size and Performance
By Technical Paper Link - 20 Jan, 2025 - Comments: 0

A new technical paper titled "Novel Trade-offs in 5 nm FinFET SRAM Arrays at Extremely Low Temperatures" was published by researchers at University of Stuttgart, IIT Kanpur, National Yang Ming Chiao Tung University, Khalifa University, and TU Munich. Abstract "Complementary metal–oxide–semiconductor (CMOS)-based computing promises drastic improvement in performance at extremely low temp... » read more

Design-Space Analysis of M3D FPGA With BEOL Configuration Memories (Georgia Tech, UCLA)
By Technical Paper Link - 17 Jan, 2025 - Comments: 0

A new technical paper titled "Monolithic 3D FPGAs Utilizing Back-End-of-Line Configuration Memories" was published by researchers at Georgia Tech and UCLA. Abstract "This work presents a novel monolithic 3D (M3D) FPGA architecture that leverages stackable back-end-of-line (BEOL) transistors to implement configuration memory and pass gates, significantly improving area, latency, and power ef... » read more

Design Space for the Device-Circuit Codesign of NVM-Based CIM Accelerators (TSMC)
By Technical Paper Link - 15 Jan, 2025 - Comments: 0

A new technical paper/mini-review titled "Assessing Design Space for the Device-Circuit Codesign of Nonvolatile Memory-Based Compute-in-Memory Accelerators" was published by researchers at TSMC and National Tsing Hua University. Abstract "Unprecedented penetration of artificial intelligence (AI) algorithms has brought about rapid innovations in electronic hardware, including new memory devi... » read more

Recent Advances and Challenges in Processing-in-DRAM (ETH Zurich)
By Technical Paper Link - 30 Dec, 2024 - Comments: 0

A new technical paper titled "Memory-Centric Computing: Recent Advances in Processing-in-DRAM" was published by researchers at ETH Zurich. Abstract "Memory-centric computing aims to enable computation capability in and near all places where data is generated and stored. As such, it can greatly reduce the large negative performance and energy impact of data access and data movement, by 1) ... » read more

2D Ferroelectric Field-Effect Transistors (Penn State, U. of Minnesota)
By Technical Paper Link - 30 Dec, 2024 - Comments: 0

A new technical paper titled "Multifunctional 2D FETs exploiting incipient ferroelectricity in freestanding SrTiO3 nanomembranes at sub-ambient temperatures" was published by researchers at Penn State University and University of Minnesota. Abstract "Incipient ferroelectricity bridges traditional dielectrics and true ferroelectrics, enabling advanced electronic and memory devices. Firstly... » read more

Advancements in SOT-MRAM Device Development (imec)
By Technical Paper Link - 28 Dec, 2024 - Comments: 0

A technical paper titled "Recent progress in spin-orbit torque magnetic random-access memory" was recently published by imec. Abstract "Spin-orbit torque magnetic random-access memory (SOT-MRAM) offers promise for fast operation and high endurance but faces challenges such as low switching current, reliable field free switching, and back-end of line manufacturing processes. We review rece... » read more

CXL’s Potential to Elevate The Capabilities of HPC and AI Applications (Micron, Intel)
By Technical Paper Link - 20 Dec, 2024 - Comments: 0

A new technical paper titled "Optimizing System Memory Bandwidth with Micron CXL Memory Expansion Modules on Intel Xeon 6 Processors" was published by researchers at Micron and Intel. Abstract "High-Performance Computing (HPC) and Artificial Intelligence (AI) workloads typically demand substantial memory bandwidth and, to a degree, memory capacity. CXL memory expansion modules, also known... » read more

← Older posts

  • Sponsors

About

Navigation

Connect With Us

Copyright ©2013-2025 SMG   |  Terms of Service  |  Privacy Policy