HW Implementation of Memristive ANNs


A new technical paper titled "Hardware implementation of memristor-based artificial neural networks" was published by KAUST, Universitat Autònoma de Barcelona, IBM Research, USC, University of Michigan and others. Abstract: "Artificial Intelligence (AI) is currently experiencing a bloom driven by deep learning (DL) techniques, which rely on networks of connected simple computing units oper... » read more

Hardware Trojans: CPU-Oriented Trojan Trigger Circuits (Georgia Tech)


A new technical paper titled "Towards Practical Fabrication Stage Attacks Using Interrupt-Resilient Hardware Trojans" was published by researchers at Georgia Tech. The paper states: "We introduce a new class of hardware trojans called interrupt-resilient trojans (IRTs). Our work is motivated by the observation that hardware trojan attacks on CPUs, even under favorable attack scenarios (e.g.... » read more

U.S. Strategy on Microelectronics Research


The U.S. government released a 61 page report titled "National Strategy on Microelectronics Research" by the Subcommittee On Microelectronics Leadership, Committee on Homeland and National Security of the National Science and Technology Council. The report states four goals guiding the agency's efforts in microelectronics research: "Goal 1. Enable and accelerate research advances for futu... » read more

TCAM-SSD: A Framework For In-SSD Associative Search Using NAND Flash Memory


A new technical paper titled "TCAM-SSD: A Framework for Search-Based Computing in Solid-State Drives" was published by researchers at University of Illinois Urbana-Champaign, Carnegie Mellon University, Samsung Electronics and Sandia National Laboratories. Abstract "As the amount of data produced in society continues to grow at an exponential rate, modern applications are incurring signific... » read more

DRAM Chip Characterization Study of Spatial Variation of Read Disturbance and Future Solutions (ETH Zurich)


A new technical paper titled "Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions" was published by researchers at ETH Zurich. Abstract: "Read disturbance in modern DRAM chips is a widespread phenomenon and is reliably used for breaking memory isolation, a fundamental building block for building robust systems. Row... » read more

DRAM Chips Perform Functionally-Complete Boolean Operations (ETH Zurich)


A new technical paper titled "Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis" was published by researchers at ETH Zurich. Abstract: "Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the potential to significantly ... » read more

Resistive Switching Analysis In Titanium Oxide-Based Memristors Including Surface Scanning Thermal Microscopy


A technical paper titled “Thermal Compact Modeling and Resistive Switching Analysis in Titanium Oxide-Based Memristors” was published by researchers at Universidad de Granada, Leibniz-Institut für innovative Mikroelektronik, Universidad Politécnicade Madrid, University of Twente, King Abdullah University of Science and Technology (KAUST), and Universitat de Barcelona. Abstract: "Resist... » read more

An All-Optical General-Purpose CPU And Optical Computer Architecture (Akhetonics)


A technical paper titled “An All-Optical General-Purpose CPU and Optical Computer Architecture” was published by researchers at Akhetonics. Abstract: "Energy efficiency of electronic digital processors is primarily limited by the energy consumption of electronic communication and interconnects. The industry is almost unanimously pushing towards replacing both long-haul, as well as local c... » read more

Efficient Streaming Language Models With Attention Sinks (MIT, Meta, CMU, NVIDIA)


A technical paper titled “Efficient Streaming Language Models with Attention Sinks” was published by researchers at Massachusetts Institute of Technology (MIT), Meta AI, Carnegie Mellon University (CMU), and NVIDIA. Abstract: "Deploying Large Language Models (LLMs) in streaming applications such as multi-round dialogue, where long interactions are expected, is urgently needed but poses tw... » read more

Impact of Scaling and BEOL Technology Solutions At The 7nm Node On MRAM


A technical paper titled “Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories” was published by researchers at Georgia Institute of Technology. Abstract: "While magnetic random-access memories (MRAMs) are promising because of their nonvolatility, relatively fast speeds, and high endurance, there are major challenges in adopting the... » read more

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