Remote Direct Memory Introspection (Rice, Duke, MIT)


A technical paper titled "Remote Direct Memory Introspection" was published by researchers at Rice University, Duke University, and MIT. This paper won a distinguished paper award at the recent 32nd USENIX Security Symposium. Abstract: "Hypervisors have played a critical role in cloud security, but they introduce a large trusted computing base (TCB) and incur a heavy performance tax. As of... » read more

Neuromorphic Computing: Graphene-Based Memristors For Future AI Hardware From Fabrication To SNNs


A technical paper titled “A Review of Graphene-Based Memristive Neuromorphic Devices and Circuits” was published by researchers at James Cook University (Australia) and York University (Canada). Abstract: "As data processing volume increases, the limitations of traditional computers and the need for more efficient computing methods become evident. Neuromorphic computing mimics the brain's... » read more

How A Highly Controllable SDE Can Be Achieved In A Josephson Junction Where The Normal Section Is A Magnetic Racetrack 


A technical paper titled “Josephson transistor from the superconducting diode effect in domain wall and skyrmion magnetic racetracks” was published by researchers at University of Basel. Abstract: "In superconductors, the combination of broken time-reversal and broken inversion symmetries can result in a critical current being dependent on the direction of current flow. This phenomenon is... » read more

A RISC-V Capability Architecture Orchestrating Compiler, Architecture, And System Designs For Full Memory Safety (Georgia Tech, Arm Research)


A technical paper titled “RV-CURE: A RISC-V Capability Architecture for Full Memory Safety” was published by researchers at Georgia Institute of Technology and Arm Research. Abstract: "Despite decades of efforts to resolve, memory safety violations are still persistent and problematic in modern systems. Various defense mechanisms have been proposed, but their deployment in real systems re... » read more

New & Faster Single-Crystalline Oxide Thin Films (Max Planck, Cambridge, U of Penn.)


A technical paper titled “Li iontronics in single-crystalline T-Nb2O5 thin films with vertical ionic transport channels” was published by researchers at Max Planck Institute of Microstructure Physics, University of Cambridge, University of Pennsylvania, Gumi Electronics and Information Technology Research Institute, Northwestern University, and ALBA Synchrotron Light Source. Abstract: "Th... » read more

CNN Hardware Architecture With Weights Generator Module That Alleviates Impact Of The Memory Wall


A technical paper titled “Mitigating Memory Wall Effects in CNN Engines with On-the-Fly Weights Generation” was published by researchers at Samsung AI Center and University of Cambridge. Abstract: "The unprecedented accuracy of convolutional neural networks (CNNs) across a broad range of AI tasks has led to their widespread deployment in mobile and embedded settings. In a pursuit for high... » read more

Implementing Fast Barriers For A Shared-Memory Cluster Of 1024 RISC-V Cores


A technical paper titled “Fast Shared-Memory Barrier Synchronization for a 1024-Cores RISC-V Many-Core Cluster” was published by researchers at ETH Zürich and Università di Bologna. "Synchronization is likely the most critical performance killer in shared-memory parallel programs. With the rise of multi-core and many-core processors, the relative impact on performance and energy overhe... » read more

A Practical DRAM-Based Multi-Level PIM Architecture For Data Analytics


A technical paper titled "Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics" was published by researchers at Korea Advanced Institute of Science & Technology (KAIST) and SK hynix Inc. Abstract: "Processing-in-memory (PIM) architecture is an inherent match for data analytics application, but we observe major challenges to address when accelerating it usi... » read more

A Hardware Accelerator Designed For The Homomorphic SEAL-Embedded Library


A technical paper titled "VLSI Design and FPGA Implementation of an NTT Hardware Accelerator for Homomorphic SEAL-Embedded Library" was published by researchers at University of Pisa. Abstract: "Homomorphic Encryption (HE) allows performing specific algebraic computations on encrypted data without the need for decryption. For this reason, HE is emerging as a strong privacy-preserving solution... » read more

Gallium Oxide Flash Memory (KAUST & IIT)


A technical paper titled "Demonstration of β-Ga2O3 nonvolatile flash memory for oxide electronics" was published by researchers at King Abdullah University of Science and Technology (KAUST) and Indian Institute of Technology. Abstract: "This report demonstrates an ultrawide bandgap β-Ga2O3 flash memory for the first time. The flash memory device realized on heteroepitaxial β-Ga2O3 film... » read more

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