category: Memory

category: IoT, Security & Automotive

DRAM Chip Characterization Study of Spatial Variation of Read Disturbance and Future Solutions (ETH Zurich)
By Technical Paper Link - 15 Mar, 2024 - Comments: 0

A new technical paper titled "Spatial Variation-Aware Read Disturbance Defenses: Experimental Analysis of Real DRAM Chips and Implications on Future Solutions" was published by researchers at ETH Zurich. Abstract: "Read disturbance in modern DRAM chips is a widespread phenomenon and is reliably used for breaking memory isolation, a fundamental building block for building robust systems. Row... » read more

DRAM Chips Perform Functionally-Complete Boolean Operations (ETH Zurich)
By Technical Paper Link - 12 Mar, 2024 - Comments: 0

A new technical paper titled "Functionally-Complete Boolean Logic in Real DRAM Chips: Experimental Characterization and Analysis" was published by researchers at ETH Zurich. Abstract: "Processing-using-DRAM (PuD) is an emerging paradigm that leverages the analog operational properties of DRAM circuitry to enable massively parallel in-DRAM computation. PuD has the potential to significantly ... » read more

Resistive Switching Analysis In Titanium Oxide-Based Memristors Including Surface Scanning Thermal Microscopy
By Technical Paper Link - 12 Mar, 2024 - Comments: 0

A technical paper titled “Thermal Compact Modeling and Resistive Switching Analysis in Titanium Oxide-Based Memristors” was published by researchers at Universidad de Granada, Leibniz-Institut für innovative Mikroelektronik, Universidad Politécnicade Madrid, University of Twente, King Abdullah University of Science and Technology (KAUST), and Universitat de Barcelona. Abstract: "Resist... » read more

An All-Optical General-Purpose CPU And Optical Computer Architecture (Akhetonics)
By Technical Paper Link - 11 Mar, 2024 - Comments: 0

A technical paper titled “An All-Optical General-Purpose CPU and Optical Computer Architecture” was published by researchers at Akhetonics. Abstract: "Energy efficiency of electronic digital processors is primarily limited by the energy consumption of electronic communication and interconnects. The industry is almost unanimously pushing towards replacing both long-haul, as well as local c... » read more

Efficient Streaming Language Models With Attention Sinks (MIT, Meta, CMU, NVIDIA)
By Technical Paper Link - 04 Mar, 2024 - Comments: 0

A technical paper titled “Efficient Streaming Language Models with Attention Sinks” was published by researchers at Massachusetts Institute of Technology (MIT), Meta AI, Carnegie Mellon University (CMU), and NVIDIA. Abstract: "Deploying Large Language Models (LLMs) in streaming applications such as multi-round dialogue, where long interactions are expected, is urgently needed but poses tw... » read more

Impact of Scaling and BEOL Technology Solutions At The 7nm Node On MRAM
By Technical Paper Link - 20 Feb, 2024 - Comments: 0

A technical paper titled “Impact of Technology Scaling and Back-End-of-the-Line Technology Solutions on Magnetic Random-Access Memories” was published by researchers at Georgia Institute of Technology. Abstract: "While magnetic random-access memories (MRAMs) are promising because of their nonvolatility, relatively fast speeds, and high endurance, there are major challenges in adopting the... » read more

SW/HW Codesign For CXL Memory Disaggregation In Billion-Scale Nearest Neighbor Search (KAIST)
By Technical Paper Link - 14 Feb, 2024 - Comments: 0

A technical paper titled “Bridging Software-Hardware for CXL Memory Disaggregation in Billion-Scale Nearest Neighbor Search” was published by researchers at the Korea Advanced Institute of Science and Technology (KAIST) and Panmnesia. Abstract: "We propose CXL-ANNS, a software-hardware collaborative approach to enable scalable approximate nearest neighbor search (ANNS) services. To this e... » read more

Modeling And Analyzing Open-Source SoCs For Low-Power Cyber-Physical Systems
By Technical Paper Link - 08 Feb, 2024 - Comments: 0

A technical paper titled “TOP: Towards Open & Predictable Heterogeneous SoCs” was published by researchers at University of Bologna, ETH Zurich, and University of California San Diego. Abstract: "Ensuring predictability in modern real-time Systems-on-Chip (SoCs) is an increasingly critical concern for many application domains such as automotive, robotics, and industrial automation. An... » read more

Evaluation of Cache Replacement Policies Using Various Typical Simulation Approaches
By Technical Paper Link - 06 Feb, 2024 - Comments: 0

A technical paper titled “Improving the Representativeness of Simulation Intervals for the Cache Memory System” was published by researchers at Complutense University of Madrid, imec, and KU Leuven. Abstract: "Accurate simulation techniques are indispensable to efficiently propose new memory or architectural organizations. As implementing new hardware concepts in real systems is often not... » read more

Enabling Beyond-Bound Decoding For DRAM By Unraveling Reed-Solomon Codes
By Technical Paper Link - 06 Feb, 2024 - Comments: 0

A technical paper titled “Unraveling codes: fast, robust, beyond-bound error correction for DRAM” was published by researchers at Rambus. Abstract: "Generalized Reed-Solomon (RS) codes are a common choice for efficient, reliable error correction in memory and communications systems. These codes add 2t extra parity symbols to a block of memory, and can efficiently and reliably correct up ... » read more

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