category: Memory

category: IoT, Security & Automotive

Uncovering The Size, Structure, And Operation Of DRAM Subarrays And Showing Experimental Results Supporting The Cause Of Rowhammer
By Technical Paper Link - 14 Jun, 2023 - Comments: 0

A technical paper titled “X-ray: Discovering DRAM Internal Structure and Error Characteristics by Issuing Memory Commands” was published by researchers at Seoul National University and University of Illinois at Urbana-Champaign. Abstract: "The demand for accurate information about the internal structure and characteristics of dynamic random-access memory (DRAM) has been on the rise. Recen... » read more

End-To-End System Architecture For Quantum RAM (Yale, AWS, Caltech)
By Technical Paper Link - 14 Jun, 2023 - Comments: 0

A technical paper titled “Systems Architecture for Quantum Random Access Memory” was published by researchers at Yale University, AWS Center for Quantum Computing, and California Institute of Technology. Abstract: "Operating on the principles of quantum mechanics, quantum algorithms hold the promise for solving problems that are beyond the reach of the best-available classical algorithms.... » read more

A Step Towards Eliminating The Von-Neumann Bottleneck By Co-locating Photonic Computing Elements And Non-Volatile Memory 
By Technical Paper Link - 14 Jun, 2023 - Comments: 0

A technical paper titled “Non-volatile heterogeneous III-V/Si photonics via optical charge-trap memory” was published by researchers at Hewlett Packard Enterprise. "We demonstrate, for the first time, non-volatile charge-trap flash memory (CTM) co-located with heterogeneous III-V/Si photonics. The wafer-bonded III-V/Si CTM cell facilitates non-volatile optical functionality for a variety... » read more

Object Detection CNN Suitable For Edge Processors With Limited Memory
By Technical Paper Link - 14 Jun, 2023 - Comments: 0

A technical paper titled “TinyissimoYOLO: A Quantized, Low-Memory Footprint, TinyML Object Detection Network for Low Power Microcontrollers” was published by researchers at ETH Zurich. Abstract: "This paper introduces a highly flexible, quantized, memory-efficient, and ultra-lightweight object detection network, called TinyissimoYOLO. It aims to enable object detection on microcontrol... » read more

Advantages, Disadvantages, And Use Cases Of FPGAs
By Technical Paper Link - 07 Jun, 2023 - Comments: 0

A technical paper titled “Data Processing with FPGAs on Modern Architectures” was published by researchers at ETH Zürich. Abstract: "Trends in hardware, the prevalence of the cloud, and the rise of highly demanding applications have ushered an era of specialization that is quickly changing the way data is processed at scale. These changes are likely to continue and accelerate in the next... » read more

A PIM Architecture That Supports Floating Point-Precision Computations Within The Memory Chip
By Technical Paper Link - 07 Jun, 2023 - Comments: 0

A technical paper titled “FlutPIM: A Look-up Table-based Processing in Memory Architecture with Floating-point Computation Support for Deep Learning Applications” was published by researchers at Rochester Institute of Technology and George Mason University. Abstract: "Processing-in-Memory (PIM) has shown great potential for a wide range of data-driven applications, especially Deep Learnin... » read more

3D Memory Structures: Common Hole And Tilt Metrology Techniques and Capabilities
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "Inline metrology of high aspect ratio hole tilt and center line shift using small-angle x-ray scattering" was published by researchers at Bruker Nano and Lam Research. Abstract: "High aspect ratio (HAR) structures found in three-dimensional nand memory structures have unique process control challenges. The etch used to fabricate channel holes several microns deep... » read more

Hardware Security: Eliminating/Reducing A Blind Spot of Side Channels (CISPA Helmholtz Center for Information Security)
By Technical Paper Link - 03 Jun, 2023 - Comments: 0

A technical paper titled "(M)WAIT for It: Bridging the Gap between Microarchitectural and Architectural Side Channels" was published by researchers at CISPA Helmholtz Center for Information Security. Abstract: "In the last years, there has been a rapid increase in microarchitectural attacks, exploiting side effects of various parts of the CPU. Most of them have in common that they rely ... » read more

Comparing Analog and Digital SRAM In-Memory Computing Architectures (KU Leuven)
By Technical Paper Link - 01 Jun, 2023 - Comments: 0

A technical paper titled "Benchmarking and modeling of analog and digital SRAM in-memory computing architectures" was published by researchers at KU Leuven. Abstract: "In-memory-computing is emerging as an efficient hardware paradigm for deep neural network accelerators at the edge, enabling to break the memory wall and exploit massive computational parallelism. Two design models have surge... » read more

Rowhammer Vulnerability Of A HBM2 DRAM Chip
By Technical Paper Link - 01 Jun, 2023 - Comments: 0

A new technical paper titled "An Experimental Analysis of RowHammer in HBM2 DRAM Chips" was published by researchers at ETH Zurich and American University of Beirut. Abstract: "RowHammer (RH) is a significant and worsening security, safety, and reliability issue of modern DRAM chips that can be exploited to break memory isolation. Therefore, it is important to understand real DRAM chips' ... » read more

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