Polynesia, A Novel Hardware/Software Cooperative Design for In-Memory HTAP Databases


A team of researchers from ETH Zurich, Google and Univ. of Illinois Urbana-Champaign recently published a technical paper titled "Polynesia: Enabling High-Performance and Energy-Efficient Hybrid Transactional/Analytical Databases with Hardware/Software Co-Design". Abstract (partial) "We propose Polynesia, a hardware–software co-designed system for in-memory HTAP [hybrid transactional/anal... » read more

Efficient Neuromorphic AI Chip: “NeuroRRAM”


New technical paper titled "A compute-in-memory chip based on resistive random-access memory" was published by a team of international researchers at Stanford, UCSD, University of Pittsburgh, University of Notre Dame and Tsinghua University. The paper's abstract states "by co-optimizing across all hierarchies of the design from algorithms and architecture to circuits and devices, we present ... » read more

An Escalation of Rowhammer To Rows Beyond Immediate Neighbors


Researchers at Graz University of Technology, Lamarr Security Research, Google, AWS, and Rivos presented this new technical paper titled "Half-Double: Hammering From the Next Row Over" at the USENIX Security Symposium in Boston in August 2022. Abstract: "Rowhammer is a vulnerability in modern DRAM where repeated accesses to one row (the aggressor) give off electrical disturbance whose cumu... » read more

Fully CMOS-compatible Ternary Inverter with a Memory Function Using Silicon Feedback Field-Effect Transistors (FBFETs)


New technical paper titled "New ternary inverter with memory function using silicon feedback field-effect transistors" was published from researchers at Korea University. Abstract: In this study, we present a fully complementary metal–oxide–semiconductor-compatible ternary inverter with a memory function using silicon feedback field-effect transistors (FBFETs). FBFETs operate with a pos... » read more

Edge-AI Hardware for Extended Reality


New technical paper titled "Memory-Oriented Design-Space Exploration of Edge-AI Hardware for XR Applications" from researchers at Indian Institute of Technology Delhi and Reality Labs Research, Meta. Abstract "Low-Power Edge-AI capabilities are essential for on-device extended reality (XR) applications to support the vision of Metaverse. In this work, we investigate two representative XR w... » read more

Reduce RowHammer Vulnerability By Reducing Wordline Voltage


Researchers from ETH Zurich present a new technical paper titled "Understanding RowHammer Under Reduced Wordline Voltage: An Experimental Study Using Real DRAM Devices." Abstract (Partial) "This is the first work to experimentally demonstrate on 272 real DRAM chips that lowering VPP reduces a DRAM chip's RowHammer vulnerability. We show that lowering VPP 1) increases the number of activat... » read more

DRAM Chips That Employ On-Die Error Correction & Related Reliability Techniques


This new PhD thesis paper titled "Enabling Effective Error Mitigation in Memory Chips That Use On-Die Error-Correcting Codes" from ETH Zurich researcher Minesh Patel won the IEEE  William C. Carter Award in June 2022. Abstract "Improvements in main memory storage density are primarily driven by process technology scaling, which negatively impacts reliability by exacerbating various circu... » read more

SW/HW Framework for for GASNet-enabled FPGA Hardware Acceleration Infrastructure


Researchers from KAIST and Flapmax published a new technical paper titled "FSHMEM: Supporting Partitioned Global Address Space on FPGAs for Large-Scale Hardware Acceleration Infrastructure." Abstract "By providing highly efficient one-sided communication with globally shared memory space, Partitioned Global Address Space (PGAS) has become one of the most promising parallel computing model... » read more

3 Emerging Technologies: Memristors, Spintronics & 2D Materials


New technical paper titled "Memristive, Spintronic, and 2D-Materials-Based Devices to Improve and Complement Computing Hardware" from researchers at University College London and University of Cambridge. Abstract "In a data-driven economy, virtually all industries benefit from advances in information technology—powerful computing systems are critically important for rapid technological pr... » read more

Sibyl, a lightweight, reinforcement learning-based data placement technique for hybrid storage systems (ETH Zurich)


New research paper titled "Sibyl: Adaptive and Extensible Data Placement in Hybrid Storage Systems Using Online Reinforcement Learning" from researchers at ETH Zurich, Eindhoven University of Technology, and LIRMM, Univ. Montpellier, CNRS. Abstract "Hybrid storage systems (HSS) use multiple different storage devices to provide high and scalable storage capacity at high performance. Recent r... » read more

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