category: Memory

category: IoT, Security & Automotive

Data-driven RRAM device models using Kriging interpolation
By Technical Paper Link - 10 Apr, 2022 - Comments: 0

New technical paper from The George Washington University and NIST with support from DARPA and others. Abstract "A two-tier Kriging interpolation approach is proposed to model jump tables for resistive switches. Originally developed for mining and geostatistics, its locality of the calculation makes this approach particularly powerful for modeling electronic devices with complex behavior la... » read more

Memristive synaptic device based on a natural organic material—honey for spiking neural network in biodegradable neuromorphic systems
By Technical Paper Link - 06 Apr, 2022 - Comments: 0

New academic paper from Washington State University, supported by a grant from the National Science Foundation. Abstract: "Spiking neural network (SNN) in future neuromorphic architectures requires hardware devices to be not only capable of emulating fundamental functionalities of biological synapse such as spike-timing dependent plasticity (STDP) and spike-rate dependent plasticity (SRDP),... » read more

An adaptive synaptic array using Fowler–Nordheim dynamic analog memory
By Technical Paper Link - 29 Mar, 2022 - Comments: 0

Abstract "In this paper we present an adaptive synaptic array that can be used to improve the energy-efficiency of training machine learning (ML) systems. The synaptic array comprises of an ensemble of analog memory elements, each of which is a micro-scale dynamical system in its own right, storing information in its temporal state trajectory. The state trajectories are then modulated by a sys... » read more

Experimental photonic quantum memristor
By Technical Paper Link - 27 Mar, 2022 - Comments: 0

Abstract "Memristive devices are a class of physical systems with history-dependent dynamics characterized by signature hysteresis loops in their input–output relations. In the past few decades, memristive devices have attracted enormous interest in electronics. This is because memristive dynamics is very pervasive in nanoscale devices, and has potentially groundbreaking applications ranging... » read more

An Energy-Efficient DRAM Cache Architecture for Mobile Platforms With PCM-Based Main Memory
By Technical Paper Link - 21 Mar, 2022 - Comments: 0

Abstract "A long battery life is a first-class design objective for mobile devices, and main memory accounts for a major portion of total energy consumption. Moreover, the energy consumption from memory is expected to increase further with ever-growing demands for bandwidth and capacity. A hybrid memory system with both DRAM and PCM can be an attractive solution to provide additional capacity ... » read more

NAND and NOR logic-in-memory comprising silicon nanowire feedback field-effect transistors
By Technical Paper Link - 15 Mar, 2022 - Comments: 0

Abstract: "The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindra... » read more

Quantifying Rowhammer Vulnerability for DRAM Security
By Technical Paper Link - 14 Mar, 2022 - Comments: 0

Abstract: "Rowhammer is a memory-based attack that leverages capacitive-coupling to induce faults in modern dynamic random-access memory (DRAM). Over the last decade, a significant number of Rowhammer attacks have been presented to reveal that it is a severe security issue capable of causing privilege escalations, launching distributed denial-of-service (DDoS) attacks, and even runtime attack ... » read more

Benchmarking Memory-Centric Computing Systems: Analysis of Real Processing-in-Memory Hardware
By Technical Paper Link - 10 Mar, 2022 - Comments: 0

Abstract "Many modern workloads such as neural network inference and graph processing are fundamentally memory-bound. For such workloads, data movement between memory and CPU cores imposes a significant overhead in terms of both latency and energy. A major reason is that this communication happens through a narrow bus with high latency and limited bandwidth, and the low data reuse in memory-bo... » read more

SparseP: Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems
By Technical Paper Link - 08 Mar, 2022 - Comments: 0

Abstract "Several manufacturers have already started to commercialize near-bank Processing-In-Memory (PIM) architectures. Near-bank PIM architectures place simple cores close to DRAM banks and can yield significant performance and energy improvements in parallel applications by alleviating data access costs. Real PIM systems can provide high levels of parallelism, large aggregate memory bandwi... » read more

Non-destructive Thickness Characterisation of 3D Multilayer Semiconductor Devices Using Optical Spectral Measurements and Machine Learning
By Technical Paper Link - 07 Feb, 2022 - Comments: 0

Abstract: "Three-dimensional (3D) semiconductor devices can address the limitations of traditional two-dimensional (2D) devices by expanding the integration space in the vertical direction. A 3D NOT-AND (NAND) flash memory device ispresently the most commercially successful 3D semiconductor device. It vertically stacks more than 100 semiconductor material layers to provide more storage capac... » read more

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