SW/HW Framework for for GASNet-enabled FPGA Hardware Acceleration Infrastructure


Researchers from KAIST and Flapmax published a new technical paper titled "FSHMEM: Supporting Partitioned Global Address Space on FPGAs for Large-Scale Hardware Acceleration Infrastructure." Abstract "By providing highly efficient one-sided communication with globally shared memory space, Partitioned Global Address Space (PGAS) has become one of the most promising parallel computing model... » read more

3 Emerging Technologies: Memristors, Spintronics & 2D Materials


New technical paper titled "Memristive, Spintronic, and 2D-Materials-Based Devices to Improve and Complement Computing Hardware" from researchers at University College London and University of Cambridge. Abstract "In a data-driven economy, virtually all industries benefit from advances in information technology—powerful computing systems are critically important for rapid technological pr... » read more

Sibyl, a lightweight, reinforcement learning-based data placement technique for hybrid storage systems (ETH Zurich)


New research paper titled "Sibyl: Adaptive and Extensible Data Placement in Hybrid Storage Systems Using Online Reinforcement Learning" from researchers at ETH Zurich, Eindhoven University of Technology, and LIRMM, Univ. Montpellier, CNRS. Abstract "Hybrid storage systems (HSS) use multiple different storage devices to provide high and scalable storage capacity at high performance. Recent r... » read more

MEMprop: Gradient-based Learning To Train Fully Memristive SNNs


New technical paper titled "Gradient-based Neuromorphic Learning on Dynamical RRAM Arrays" from IEEE researchers. Abstract "We present MEMprop, the adoption of gradient-based learning to train fully memristive spiking neural networks (MSNNs). Our approach harnesses intrinsic device dynamics to trigger naturally arising voltage spikes. These spikes emitted by memristive dynamics are anal... » read more

HBM-based scalable multi-FPGA emulator for Quantum Fourier Transform (QFT)


New technical paper titled "A Scalable Emulator for Quantum Fourier Transform Using Multiple-FPGAs With High-Bandwidth-Memory" from researchers at Tohoku University in Japan. Abstract: "Quantum computing is regarded as the future of computing that hopefully provides exponentially large processing power compared to the conventional digital computing. However, current quantum computers do not... » read more

End to End System Design for DRAM-based TRNG


Research paper titled "DR-STRaNGe: End-to-End System Design for DRAM-based True Random Number Generators" is presented from researchers at TOBB University of Economics and Technology and ETH Zurich. Abstract "Random number generation is an important task in a wide variety of critical applications including cryptographic algorithms, scientific simulations, and industrial testing tools. True ... » read more

End-to-End System for Object Localization By Coupling pMUTs to a Neuromorphic RRAM-based Computational Map


New research paper titled "Neuromorphic object localization using resistive memories and ultrasonic transducers" from researchers at CEA, LETI, Université Grenoble Alpes and others. Abstract "Real-world sensory-processing applications require compact, low-latency, and low-power computing systems. Enabled by their in-memory event-driven computing abilities, hybrid memristive-Complementary... » read more

ETH Zurich: PIM (Processing In Memory) Architecture, UPMEM & PrIM Benchmarks


New paper technical titled "Benchmarking a New Paradigm: An Experimental Analysis of a Real Processing-in-Memory Architecture" led by researchers at ETH Zurich. Researchers provide a comprehensive analysis of the first publicly-available real-world PIM architecture, UPMEM, and introduce PrIM (Processing-In-Memory benchmarks), a benchmark suite of 16 workloads from different application domai... » read more

Simulation Framework to Evaluate the Feasibility of Large-scale DNNs based on CIM Architecture & Analog NVM


Technical paper titled "Accuracy and Resiliency of Analog Compute-in-Memory Inference Engines" from researchers at UCLA. Abstract "Recently, analog compute-in-memory (CIM) architectures based on emerging analog non-volatile memory (NVM) technologies have been explored for deep neural networks (DNNs) to improve scalability, speed, and energy efficiency. Such architectures, however, leverage ... » read more

Effect of Different Frequency Scaling Levels on Memory in Regard to Total Power Consumption in Mobile MPSoC


New technical paper titled "CPU-GPU-Memory DVFS for Power-Efficient MPSoC in Mobile Cyber Physical Systems" from researchers at University of Essex, Nosh Technologies, and University of Southampton. Abstract "Most modern mobile cyber-physical systems such as smartphones come equipped with multi-processor systems-on-chip (MPSoCs) with variant computing capacity both to cater to performance r... » read more

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