category: Power & Performance

category: IoT, Security & Automotive

LLM-Aided AI Accelerator Design Automation (Georgia Tech)
By Technical Paper Link - 28 Sep, 2023 - Comments: 0

A technical paper titled “GPT4AIGChip: Towards Next-Generation AI Accelerator Design Automation via Large Language Models” was published by researchers at Georgia Institute of Technology. Abstract: "The remarkable capabilities and intricate nature of Artificial Intelligence (AI) have dramatically escalated the imperative for specialized AI accelerators. Nonetheless, designing these accele... » read more

Detecting Hardware Trojans Using Analytical Modeling
By Technical Paper Link - 27 Sep, 2023 - Comments: 0

A technical paper titled “Secure Run-Time Hardware Trojan Detection Using Lightweight Analytical Models” was published by researchers at National University of Singapore and Universitat Politecnica de Catalunya. Abstract: "Hardware Trojans, malicious components that attempt to prevent a chip from operating as expected, are carefully crafted to circumvent detection during the pre-deploymen... » read more

Design Optimization Of Split-Gate NOR Flash For Compute-In-Memory
By Technical Paper Link - 19 Sep, 2023 - Comments: 0

A technical paper titled “Design Strategies of 40 nm Split-Gate NOR Flash Memory Device for Low-Power Compute-in-Memory Applications” was published by researchers at Seoul National University of Science and Technology and University of Seoul. Abstract: "The existing von Neumann architecture for artificial intelligence (AI) computations suffers from excessive power consumption and memo... » read more

Leveraging In-Package Wireless Technology To Improve The Thermal Behavior Of 2.5D Chiplet-Based SoP
By Technical Paper Link - 19 Sep, 2023 - Comments: 0

A technical paper titled “REMOTE: Re-thinking Task Mapping on Wireless 2.5D Systems-on-Package for Hotspot Removal” was published by researchers at Swiss Federal Institute of Technology Lausanne (EPFL) and University of Applied Sciences and Arts of Western Switzerland (HES-SO). Abstract Excerpt "In this work, we propose a new task mapping heuristic that leverages in-package wireless t... » read more

Hardware Platform For Evolving Robots
By Technical Paper Link - 15 Sep, 2023 - Comments: 0

A technical paper titled “Practical hardware for evolvable robots” was published by researchers at University of York, Edinburgh Napier University, Vrije Universiteit Amsterdam, University of the West of England, and University of Sunderland. Abstract: "The evolutionary robotics field offers the possibility of autonomously generating robots that are adapted to desired tasks by iteratively... » read more

A Hierarchical Instruction Cache Tailored To Ultra-Low-Power Tightly-Coupled Processor Clusters
By Technical Paper Link - 15 Sep, 2023 - Comments: 0

A technical paper titled “Scalable Hierarchical Instruction Cache for Ultra-Low-Power Processors Clusters” was published by researchers at University of Bologna, ETH Zurich, and GreenWaves Technologies. Abstract: "High Performance and Energy Efficiency are critical requirements for Internet of Things (IoT) end-nodes. Exploiting tightly-coupled clusters of programmable processors (CMPs) ha... » read more

SG2042 64-Core RISC-V CPU Versus Existing RISC-V HW And High Performance x86 CPUs
By Technical Paper Link - 13 Sep, 2023 - Comments: 0

A technical paper titled “Is RISC-V ready for HPC prime-time: Evaluating the 64-core Sophon SG2042 RISC-V CPU” was published by researchers at University of Edinburgh. Abstract: "The Sophon SG2042 is the world's first commodity 64-core RISC-V CPU for high performance workloads and an important question is whether the SG2042 has the potential to encourage the HPC community to embrace RISC-... » read more

DRAM Simulator For Evaluation of Memory System Design Changes (ETH Zurich)
By Technical Paper Link - 13 Sep, 2023 - Comments: 0

A technical paper titled “Ramulator 2.0: A Modern, Modular, and Extensible DRAM Simulator” was published by researchers at ETH Zurich. Abstract: "We present Ramulator 2.0, a highly modular and extensible DRAM simulator that enables rapid and agile implementation and evaluation of design changes in the memory controller and DRAM to meet the increasing research effort in improving the perfo... » read more

Neuromorphic Artificial Synaptic Device Combining Memristor Arrays With Copper Iodide
By Technical Paper Link - 13 Sep, 2023 - Comments: 0

A technical paper titled “Charge-Mediated Copper-Iodide-Based Artificial Synaptic Device with Ultrahigh Neuromorphic Efficacy” was published by researchers at University of Glasgow, City University of Hong Kong, and Hong Kong Metropolitan University. Abstract: "In the realm of artificial intelligence, ultrahigh-performance neuromorphic computing plays a significant role in executing multi... » read more

A Perovskite-Derivative Nickelate Offering More Durable, Sustainable Multi-Level Non-Volatile Phase Change Memory
By Technical Paper Link - 13 Sep, 2023 - Comments: 0

A technical paper titled “Thermally Reentrant Crystalline Phase Change in Perovskite-Derivative Nickelate Enabling Reversible Switching of Room-Temperature Electrical Resistivity” was published by researchers at Tohoku University and University of Tsukuba. Abstract: "Reversible switching of room-temperature electrical resistivity due to crystal-amorphous transition is demonstrated in vari... » read more

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