Hardware Security: Eliminating/Reducing A Blind Spot of Side Channels (CISPA Helmholtz Center for Information Security)


A technical paper titled "(M)WAIT for It: Bridging the Gap between Microarchitectural and Architectural Side Channels" was published by researchers at CISPA Helmholtz Center for Information Security. Abstract: "In the last years, there has been a rapid increase in microarchitectural attacks, exploiting side effects of various parts of the CPU. Most of them have in common that they rely ... » read more

Rowhammer Vulnerability Of A HBM2 DRAM Chip


A new technical paper titled "An Experimental Analysis of RowHammer in HBM2 DRAM Chips" was published by researchers at ETH Zurich and American University of Beirut. Abstract: "RowHammer (RH) is a significant and worsening security, safety, and reliability issue of modern DRAM chips that can be exploited to break memory isolation. Therefore, it is important to understand real DRAM chips' ... » read more

EV Charging Hardware Attacks


A technical paper titled "ChargeX: Exploring State Switching Attack on Electric Vehicle Charging Systems" was published by researchers at Michigan State University, Washington University in St. Louis, and Texas A&M University. Abstract: "Electric Vehicle (EV) has become one of the promising solutions to the ever-evolving environmental and energy crisis. The key to the wide adoption of E... » read more

Circuit Layout-Level Hardware Trojan Detection


A new technical paper titled "A Needle in the Haystack: Inspecting Circuit Layout to Identify Hardware Trojans" was published by researchers at The University of Texas at Dallas and Qualcomm. Abstract "Distributed integrated circuit (IC) supply chain has resulted in a myriad of security vulnerabilities including that of hardware Trojan (HT). An HT can perform malicious modifications on an I... » read more

Attestation Scheme Monitoring The Prover Using Hardware Security Module Connected To Its System Bus (Oxford)


A technical paper titled "Hardware-assisted remote attestation design for critical embedded systems" was published by researchers at University of Oxford. Abstract (excerpt) "To reveal attack scenarios exploiting the memory regions and time windows left unattested, we propose an attestation scheme that can continuously monitor both static and dynamic memory regions with better spatial and t... » read more

ML-Based Third-Party IP Trust Verification Framework (U. of Florida, U. of Kansas)


A technical paper titled "Hardware IP Assurance against Trojan Attacks with Machine Learning and Post-processing" was published by researchers at University of Florida and University of Kansas. Abstract: "System-on-chip (SoC) developers increasingly rely on pre-verified hardware intellectual property (IP) blocks often acquired from untrusted third-party vendors. These IPs might contain hidd... » read more

CAN Bus Security Using TDCs (ETH Zurich & CISPA Helmholtz Center)


A technical paper titled "EdgeTDC: On the Security of Time Difference of Arrival Measurements in CAN Bus Systems" was published by researchers at ETH Zurich and CISPA Helmholtz Center for Information Security. Abstract "A Controller Area Network (CAN bus) is a message- based protocol for intra-vehicle communication designed mainly with robustness and safety in mind. In real-world deployment... » read more

State of the Art And Future Directions of Rowhammer (ETH Zurich)


A new technical paper titled "Fundamentally Understanding and Solving RowHammer" was published by researchers at ETH Zurich. Abstract "We provide an overview of recent developments and future directions in the RowHammer vulnerability that plagues modern DRAM (Dynamic Random Memory Access) chips, which are used in almost all computing systems as main memory. RowHammer is the phenomenon in... » read more

Hybrid Hardware Fuzzer, Combining Capabilities of Formal Verification Methods And Fuzzing Tools


A new technical paper titled "HyPFuzz: Formal-Assisted Processor Fuzzing" was published by researchers at Texas A&M University and Technische Universität Darmstadt. Abstract: "Recent research has shown that hardware fuzzers can effectively detect security vulnerabilities in modern processors. However, existing hardware fuzzers do not fuzz well the hard-to-reach design spaces. Consequently,... » read more

Overview of Machine Learning Algorithms Used In Hardware Security (TU Delft)


A new technical paper titled "A Survey on Machine Learning in Hardware Security" was published by researchers at TU Delft. Abstract "Hardware security is currently a very influential domain, where each year countless works are published concerning attacks against hardware and countermeasures. A significant number of them use machine learning, which is proven to be very effective in ... » read more

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