Probing Attacks Against Chiplets


A technical paper titled “Evaluating Vulnerability of Chiplet-Based Systems to Contactless Probing Techniques” was published by researchers at University of Massachusetts and Worcester Polytechnic Institute. Abstract: "Driven by a need for ever increasing chip performance and inclusion of innovative features, a growing number of semiconductor companies are opting for all-inclusive System-... » read more

Properties of Commercially Available Hexagonal Boron Nitride Grown By The CVD Method


A new technical paper titled "On the quality of commercial chemical vapour deposited hexagonal boron nitride" was published by researchers at KAUST and the National Institute for Materials Science in Japan. Abstract "The semiconductors industry has put its eyes on two-dimensional (2D) materials produced by chemical vapour deposition (CVD) because they can be grown at the wafer level with sm... » read more

Testing/Probing Single Electrons Across 300mm Spin Qubit Wafers (Intel)


A technical paper titled “Probing single electrons across 300-mm spin qubit wafers” was published by researchers at Intel Corporation. Abstract: "Building a fault-tolerant quantum computer will require vast numbers of physical qubits. For qubit technologies based on solid-state electronic devices, integrating millions of qubits in a single processor will require device fabrication to reac... » read more

Metrology For 2D Materials: A Review From The International Roadmap For Devices And Systems (NIST, Et Al.)


A technical paper titled “Metrology for 2D materials: a perspective review from the international roadmap for devices and systems” was published by researchers at Arizona State University, IBM Research, Unity-SC, and the National Institute of Standards and Technology (NIST). Abstract: "The International Roadmap for Devices and Systems (IRDS) predicts the integration of 2D materials into h... » read more

High-NA EUVL: Automated Defect Inspection Based on SEMI-SuperYOLO-NAS


A new technical paper titled "Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS" was published by researchers at KU Leuven, imec, Ghent University, and SCREEN SPE. Abstract "Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufac... » read more

Benchmarking Electron Holography And Pixelated STEM On Various Semiconductor Structures


A technical paper titled “Measuring electrical properties in semiconductor devices by pixelated STEM and off-axis electron holography (or convergent beams vs. plane waves).” was published by researchers at CEA-LETI at the Universite Grenoble Alpes and EPFL. Abstract: "We demonstrate the use of both pixelated differential phase contrast (DPC) scanning transmission electron microscopy (STEM... » read more

An Overview Of Federal Government Semiconductors And Microelectronics Standards Activities (NIST)


A technical paper titled “Semiconductors and Microelectronics Standards, Report of the Semiconductors and Microelectronics Working Group” was published by researchers at the National Institute of Standards and Technology (NIST). Abstract: "This report of the Semiconductors and Microelectronics Working Group of the Interagency Committee on Standards Policy (ICSP) provides an overview of Fe... » read more

A Framework For Improving Current Defect Inspection Techniques For Advanced Nodes


A technical paper titled “Improved Defect Detection and Classification Method for Advanced IC Nodes by Using Slicing Aided Hyper Inference with Refinement Strategy” was published by researchers at Ghent University, imec, and SCREEN SPE. Abstract: "In semiconductor manufacturing, lithography has often been the manufacturing step defining the smallest possible pattern dimensions. In recent ... » read more

Small-Footprint Engineered Scattering Elements For Polarization Monitoring Of Photonic ICs


A technical paper titled “Engineered scattering elements used as optical test points in photonic integrated circuits” was published by researchers at University of Rochester. Abstract: "Efficient packaging of fabricated photonic integrated circuits (PICs) has been a daunting task given the breadth of applications and skill required for scalable manufacturing. One particular challenge has ... » read more

High-Speed Sparse Scanning Kelvin Probe Force Microscopy


A technical paper titled “High-speed mapping of surface charge dynamics using sparse scanning Kelvin probe force microscopy” was published by researchers at Oak Ridge National Laboratory, (ORNL), Sungkyunkwan University, Case Western Reserve University, Flinders University, Bedford Park, and UNSW Sydney. Abstract: "Unraveling local dynamic charge processes is vital for progress in diverse... » read more

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