Small-Footprint Engineered Scattering Elements For Polarization Monitoring Of Photonic ICs

A technical paper titled “Engineered scattering elements used as optical test points in photonic integrated circuits” was published by researchers at University of Rochester. Abstract: "Efficient packaging of fabricated photonic integrated circuits (PICs) has been a daunting task given the breadth of applications and skill required for scalable manufacturing. One particular challenge has ... » read more

High-Speed Sparse Scanning Kelvin Probe Force Microscopy

A technical paper titled “High-speed mapping of surface charge dynamics using sparse scanning Kelvin probe force microscopy” was published by researchers at Oak Ridge National Laboratory, (ORNL), Sungkyunkwan University, Case Western Reserve University, Flinders University, Bedford Park, and UNSW Sydney. Abstract: "Unraveling local dynamic charge processes is vital for progress in diverse... » read more

Modulated Electron Microscopy Applied In The Process Monitoring Of Memory Cell And The Defect Inspection Of Floating Circuits

A technical paper titled “In situ electrical property quantification of memory devices by modulated electron microscopy” was published by researchers at Hitachi High-Tech Corporation, KIOXIA Corporation, and Western Digital. Abstract: "E-beam inspection based on voltage-contrast (VC) defect metrology has been widely utilized for failure mode analysis of memory devices. Variation in e-beam... » read more

CPU Fuzzing Via Intricate Program Generation (ETH Zurich)

A technical paper titled “Cascade: CPU Fuzzing via Intricate Program Generation” was published by researchers at ETH Zurich. Abstract: "Generating interesting test cases for CPU fuzzing is akin to generating programs that exercise unusual states inside the CPU. The performance of CPU fuzzing is heavily influenced by the quality of these programs and by the overhead of bug detection. Our a... » read more

Predicting Defect Properties In Semiconductors With Graph Neural Networks

A technical paper titled “Accelerating Defect Predictions in Semiconductors Using Graph Neural Networks” was published by researchers at Purdue University, Indian Institute of Technology (IIT) Madras, GE Research, and National Institute of Standards and Technology (NIST). Abstract: "Here, we develop a framework for the prediction and screening of native defects and functional impurities i... » read more

Measurement-Induced Quantum Information Phases On Up To 70 Superconducting Qubits (Google/Stanford)

A technical paper titled “Measurement-induced entanglement and teleportation on a noisy quantum processor” was published by researchers at Google Quantum AI, Google Research, Stanford University, University of Texas at Austin, Cornell University, University of Massachusetts, University of Connecticut, Auburn University, University of Technology Sydney, University of California, and Columbia... » read more

LLMs For Hardware Design Verification

A technical paper titled “LLM4DV: Using Large Language Models for Hardware Test Stimuli Generation” was published by researchers at University of Cambridge, lowRISC, and Imperial College London. Abstract: "Test stimuli generation has been a crucial but labor-intensive task in hardware design verification. In this paper, we revolutionize this process by harnessing the power of large langua... » read more

Industry 4.0 Paradigms For Chip Workforce Development And Domestic Production: Using Automation And AR/VR

A technical paper titled “From Talent Shortage to Workforce Excellence in the CHIPS Act Era: Harnessing Industry 4.0 Paradigms for a Sustainable Future in Domestic Chip Production” was published by researchers at University of Florida Gainesville, ZEISS Microscopy, and US Partnership for Assured Electronics (USPAE). Abstract: "The CHIPS Act is driving the U.S. towards a self-sustainable f... » read more

A Practical DRAM-Based Multi-Level PIM Architecture For Data Analytics

A technical paper titled "Darwin: A DRAM-based Multi-level Processing-in-Memory Architecture for Data Analytics" was published by researchers at Korea Advanced Institute of Science & Technology (KAIST) and SK hynix Inc. Abstract: "Processing-in-memory (PIM) architecture is an inherent match for data analytics application, but we observe major challenges to address when accelerating it usi... » read more

A 3D MEMS Coaxial Socket Overcomes Challenges In Semiconductor Package Chip Testing

A technical paper titled "Fabrication and Characterization of Three-Dimensional Microelectromechanical System Coaxial Socket Device for Semiconductor Package Testing" was published by researchers at Yonsei University and Protec MEMS Technology. Abstract: "With the continuous reduction in size and increase in density of semiconductor devices, there is a growing demand for contact solutions tha... » read more

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