Functional Compaction for Functional Test Sequences (Purdue University, I. Pomeranz)


A new technical paper titled "Functional Compaction for Functional Test Sequences" was published by IEEE Fellow Irith Pomeranz at Purdue University. Abstract: "The occurrence of silent data corruption because of hardware defects in large scale data centers points to the advantages of applying functional test sequences to detect hardware defects that escape scan-based tests. When using funct... » read more

Finely Tuning The Electronic Band Structure of WSe2 With AFM


A technical paper titled “Strain Driven Electrical Bandgap Tuning of Atomically Thin WSe2” was published by researchers at University of Toronto, University of Tokyo,  and Stanford University. Abstract: "Tuning electrical properties of 2D materials through mechanical strain has predominantly focused on n-type 2D materials like MoS2 and WS2, while p-type 2D materials such as WSe2 remain... » read more

Overview of Test Strategies for 3DICs


A new technical paper titled "Design-for-Test Solutions for 3D Integrated Circuits" was published by researchers at Duke University, Arizona State University, and NVIDIA. Abstract: "As Moore's Law approaches its limits, 3D integrated circuits (ICs) have emerged as promising alternatives to conventional scaling methodologies. However, the benefits of 3D integration in terms of lower power co... » read more

Probing Attacks Against Chiplets


A technical paper titled “Evaluating Vulnerability of Chiplet-Based Systems to Contactless Probing Techniques” was published by researchers at University of Massachusetts and Worcester Polytechnic Institute. Abstract: "Driven by a need for ever increasing chip performance and inclusion of innovative features, a growing number of semiconductor companies are opting for all-inclusive System-... » read more

Properties of Commercially Available Hexagonal Boron Nitride Grown By The CVD Method


A new technical paper titled "On the quality of commercial chemical vapour deposited hexagonal boron nitride" was published by researchers at KAUST and the National Institute for Materials Science in Japan. Abstract "The semiconductors industry has put its eyes on two-dimensional (2D) materials produced by chemical vapour deposition (CVD) because they can be grown at the wafer level with sm... » read more

Testing/Probing Single Electrons Across 300mm Spin Qubit Wafers (Intel)


A technical paper titled “Probing single electrons across 300-mm spin qubit wafers” was published by researchers at Intel Corporation. Abstract: "Building a fault-tolerant quantum computer will require vast numbers of physical qubits. For qubit technologies based on solid-state electronic devices, integrating millions of qubits in a single processor will require device fabrication to reac... » read more

Metrology For 2D Materials: A Review From The International Roadmap For Devices And Systems (NIST, Et Al.)


A technical paper titled “Metrology for 2D materials: a perspective review from the international roadmap for devices and systems” was published by researchers at Arizona State University, IBM Research, Unity-SC, and the National Institute of Standards and Technology (NIST). Abstract: "The International Roadmap for Devices and Systems (IRDS) predicts the integration of 2D materials into h... » read more

High-NA EUVL: Automated Defect Inspection Based on SEMI-SuperYOLO-NAS


A new technical paper titled "Towards Improved Semiconductor Defect Inspection for high-NA EUVL based on SEMI-SuperYOLO-NAS" was published by researchers at KU Leuven, imec, Ghent University, and SCREEN SPE. Abstract "Due to potential pitch reduction, the semiconductor industry is adopting High-NA EUVL technology. However, its low depth of focus presents challenges for High Volume Manufac... » read more

Benchmarking Electron Holography And Pixelated STEM On Various Semiconductor Structures


A technical paper titled “Measuring electrical properties in semiconductor devices by pixelated STEM and off-axis electron holography (or convergent beams vs. plane waves).” was published by researchers at CEA-LETI at the Universite Grenoble Alpes and EPFL. Abstract: "We demonstrate the use of both pixelated differential phase contrast (DPC) scanning transmission electron microscopy (STEM... » read more

An Overview Of Federal Government Semiconductors And Microelectronics Standards Activities (NIST)


A technical paper titled “Semiconductors and Microelectronics Standards, Report of the Semiconductors and Microelectronics Working Group” was published by researchers at the National Institute of Standards and Technology (NIST). Abstract: "This report of the Semiconductors and Microelectronics Working Group of the Interagency Committee on Standards Policy (ICSP) provides an overview of Fe... » read more

← Older posts