TFETs: Design and Operation, Including Material Selection and Simulation Methods


A new technical paper titled "Multiscale Simulation and Machine Learning Facilitated Design of Two-Dimensional Nanomaterials-Based Tunnel Field-Effect Transistors: A Review" was published by researchers at University of Chicago and Argonne National Lab. Abstract "Traditional transistors based on complementary metal-oxide-semiconductor (CMOS) and metal-oxide-semiconductor field-effect transi... » read more

Review Paper: Challenges Required To Bring the Energy Consumption Down in Microelectronics (Rice, UC Berkeley, Georgia Tech, Et al.)


A new review article titled "Roadmap on low-power electronics" by researchers at Rice University, UC Berkeley, Georgia Tech, TSMC, Intel, Harvard, et al. This roadmap to energy efficient electronics written by numerous collaborators covers materials, modeling, architectures, manufacturing, metrology and more. Find the technical paper here. September 2024. Ramamoorthy Ramesh, Sayeef Sal... » read more

Ambipolar Schottky-based FeFET For Ultrascaled Memory Applications


A new technical paper titled "On the Potential of Ambipolar Schottky-Based Ferroelectric Transistor Designs for Enhanced Memory Windows in Scaled Devices" was published by researchers at Global TCAD Solutions, Igor Sikorsky Kyiv Polytechnic Institute, INSA Lyon, and NaMLab. "Here, we promote an ambipolar Schottky-based ferroelectric transistor (AS-FeFET) as an alternative design. We demonstr... » read more

Flexible IGZO RISC-V Microprocessor


A new technical paper titled "Bendable non-silicon RISC-V microprocessor" was published by researchers at Pragmatic Semiconductor, Qamcom,  and Harvard University. From the abstract: "Here we present Flex-RV, a 32-bit microprocessor based on an open RISC-V instruction set fabricated with indium gallium zinc oxide thin-film transistors on a flexible polyimide substrate, enabling an ultralow... » read more

Dualtronics: Photonic Devices on the Cation Face and Electronic Devices on the Anion Face of the Same Wafer


A new technical paper titled "Using both faces of polar semiconductor wafers for functional devices" was published by researchers at Cornell University and Polish Academy of Sciences. Find the technical paper here. Published September 2024. Cornell University's news release is here, stating "Cornell researchers, in collaboration with a team at the Polish Academy of Sciences, have develope... » read more

Models for Both Strained and Unstrained GAA FETs Using Neural Networks


A new technical paper titled "Impact of Strain on Sub-3 nm Gate-all-Around CMOS Logic Circuit Performance Using a Neural Compact Modeling Approach" was published by researchers at Hanyang University and Alsemy Inc. Abstract "Impact of strain of sub-3 nm gate-all-around (GAA) CMOS transistors on the circuit performance is evaluated using a neural compact model. The model was trained using 3D... » read more

Improving The Air-Stability and NBTI Reliability of BEOL CNFETs


A new technical paper titled "Overcoming Ambient Drift and Negative-Bias Temperature Instability in Foundry Carbon Nanotube Transistors" was published by researchers at MIT, Stanford University, Carnegie Mellon University and Analog Devices. Abstract: "Back-end-of-line (BEOL) logic integration is emerging as a complementary scaling path to supplement front-end-of-line (FEOL) Silicon. Among ... » read more

Scalable Fabrication of Graphene FETs on Non-Planar Surfaces (Imperial College London)


A new technical paper titled "Fabrication of graphene field effect transistors on complex non-planar surfaces" was published by researchers at Imperial College London. Abstract "Graphene field effect transistors (GFETs) are promising devices for biochemical sensing. Integrating GFETs onto complex non-planar surfaces could uncap their potential in emerging areas of wearable electronics, such... » read more

Large-Scale VFETs With Ultra-Short Channel Length And High Performance


A new technical paper titled "Large-scale sub-5-nm vertical transistors by van der Waals integration" was published by researchers at Hunan University. "Here, we demonstrate a layer-by-layer transfer process of large-scale indium gallium zinc oxide (IGZO) semiconductor arrays and metal electrodes, and realize large-scale VFETs with ultra-short channel length and high device performance," sta... » read more

Buried Si/SiGe Interfaces Investigated Using Soft X-Ray Reflectometry and STEM-EDX


A new technical paper titled "Interface sharpness in stacked thin film structures: a comparison of soft X-ray reflectometry and transmission electron microscopy" was published by researchers at Physikalisch-Technische Bundesanstalt (PTB), imec, and Thermo Fisher Scientific Inc. The paper states: "A key element of semiconductor fabrication is the precise deposition of thin films. Among other... » read more

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