Scalable Fabrication of Graphene FETs on Non-Planar Surfaces (Imperial College London)


A new technical paper titled "Fabrication of graphene field effect transistors on complex non-planar surfaces" was published by researchers at Imperial College London. Abstract "Graphene field effect transistors (GFETs) are promising devices for biochemical sensing. Integrating GFETs onto complex non-planar surfaces could uncap their potential in emerging areas of wearable electronics, such... » read more

Large-Scale VFETs With Ultra-Short Channel Length And High Performance


A new technical paper titled "Large-scale sub-5-nm vertical transistors by van der Waals integration" was published by researchers at Hunan University. "Here, we demonstrate a layer-by-layer transfer process of large-scale indium gallium zinc oxide (IGZO) semiconductor arrays and metal electrodes, and realize large-scale VFETs with ultra-short channel length and high device performance," sta... » read more

Buried Si/SiGe Interfaces Investigated Using Soft X-Ray Reflectometry and STEM-EDX


A new technical paper titled "Interface sharpness in stacked thin film structures: a comparison of soft X-ray reflectometry and transmission electron microscopy" was published by researchers at Physikalisch-Technische Bundesanstalt (PTB), imec, and Thermo Fisher Scientific Inc. The paper states: "A key element of semiconductor fabrication is the precise deposition of thin films. Among other... » read more

5 Novel Layout Design Methodologies For The 3nm Nanosheet FET Library (Samsung, KNU)


A new technical paper titled "Design Technology Co-Optimization and Time-Efficient Verification for Enhanced Pin Accessibility in the Post-3-nm Node" was published by researchers at Samsung Electronics and Kyungpook National University (KNU). Abstract: "As the technology nodes approach 3 nm and beyond, nanosheet FETs (NSFETs) are replacing FinFETs. However, despite the migration of devices ... » read more

Monolithic 3D TFT Integration at Room Temperature, Used to Stack 10 Vertical Layers


A new technical paper titled "Three-dimensional integrated metal-oxide transistors" was published by researchers at KAUST (King Abdullah University of Science and Technology). Abstract "The monolithic three-dimensional vertical integration of thin-film transistor (TFT) technologies could be used to create high-density, energy-efficient and low-cost integrated circuits. However, the develo... » read more

Power Electronic Packaging for Discrete Dies


A technical paper titled “Substrate Embedded Power Electronics Packaging for Silicon Carbide MOSFETs” was published by researchers at University of Cambridge, University of Warwick, Chongqing University, and SpaceX. Abstract: "This paper proposes a new power electronic packaging for discrete dies, namely Standard Cell which consists of a step-etched active metal brazed (AMB) substrate and... » read more

Device Characteristics of GAA-Structured CMOS and CTFET Under Varying Temperatures


A new technical paper titled "Vertical-Stack Nanowire Structure of MOS Inverter and TFET Inverter in Low-temperature Application" was published by researchers at National Tsing Hua University and National United University in Taiwan. Abstract "Tunneling field effect transistors (TFET) have emerged as promising candidates for integrated circuits beyond conventional metal oxide semiconductor ... » read more

GaN Devices: Properties and Performance At Extremely High Temperatures


A new technical paper titled "High temperature stability of regrown and alloyed Ohmic contacts to AlGaN/GaN heterostructure up to 500 °C" was published by researchers at MIT, Technology Innovation Institute, Ohio State University, Rice University and Bangladesh University of Engineering and Technology. Abstract "This Letter reports the stability of regrown and alloyed Ohmic contacts to A... » read more

Ferroelectric Memory-Based IMC for ML Workloads


A new technical paper titled "Ferroelectric capacitors and field-effect transistors as in-memory computing elements for machine learning workloads" was published by researchers at Purdue University. Abstract "This study discusses the feasibility of Ferroelectric Capacitors (FeCaps) and Ferroelectric Field-Effect Transistors (FeFETs) as In-Memory Computing (IMC) elements to accelerate mach... » read more

Demonstrating The Feasibility Of The Foundry Model For Flexible Thin-Film Electronics 


A technical paper titled “Multi-project wafers for flexible thin-film electronics by independent foundries” was published by researchers at KU Leuven and imec. Abstract: "Flexible and large-area electronics rely on thin-film transistors (TFTs) to make displays, large-area image sensors, microprocessors, wearable healthcare patches, digital microfluidics and more. Although silicon-based co... » read more

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