Precise Control Needed For Copper Plating And CMP


Chipmakers are relying on machine learning for electroplating and wafer cleaning at leading-edge process nodes, augmenting traditional fault detection/classification and statistical process control in order to extend the usefulness of copper interconnects. Copper is well understood and easy to work with, but it is running out of steam. At 5nm and below, copper plating tools are struggling to... » read more

Ruthenium Interconnects On Tap


Chipmakers' focus on new interconnect technology is ramping up as copper's effectiveness continues to diminish, setting the stage for a significant shift that could improve performance and reduce heat at future nodes and in advanced packages. The introduction of copper interconnects in 1997 upended the then-standard tungsten via/aluminum line metallization scheme. Dual damascene integration ... » read more

What’s Missing In Test


Experts at the Table: Semiconductor Engineering sat down to discuss how functional test content is brought up at first silicon, and the balance between ATE and system-level testing, with Klaus-Dieter Hilliges, V93000 platform extension manager at Advantest Europe; Robert Cavagnaro, fellow in the Design Engineering Group at Intel (responsible for manufacturing and test strategy of data center... » read more

IC Industry’s Growing Role In Sustainability


The massive power needs of AI systems are putting a spotlight on sustainability in the semiconductor ecosystem. The chip industry needs to be able to produce more efficient and lower-power semiconductors. But demands for increased processing speed are rising with the widespread use of large language models and the overall increase in the amount of data that needs to be processed. Gartner estima... » read more

Temperature: A Growing Concern For Chip Security Experts


While everyone in the semiconductor industry wants to have the hottest new product, having that type of temperature manifest in a literal sense poses a threat not just to product stability and performance but to the security of the chips themselves. Temperature has become an object of fascination to security researchers due to the vagaries of how the physical properties of heat affect perfor... » read more

New Approaches Needed For Power Management


Power is becoming a bigger concern as the amount of data being processed continues to grow, forcing chipmakers and systems companies to rethink compute architectures from the end point all the way to the data center. There is no simple fix to this problem. More data is being collected, moved, and processed, requiring more power at every step, and more attention to physical effects such as he... » read more

When To Expect Domain-Specific AI Chips


The chip industry is moving toward domain-specific computation, while artificial intelligence (AI) is moving in the opposite direction, creating a gap that could force significant changes in how chips and systems are architected in the future. Behind this split is the amount of time it takes to design hardware and software. In the 18 months since ChatGPT was launched on the world, there has ... » read more

Big Shift: Creating Automotive SW Without HW


Experts at the Table: The automotive ecosystem is undergoing a transformation toward software-defined vehicles, spurring new architectures with more software. Semiconductor Engineering sat down to discuss the impact of these changes with Suraj Gajendra, vice president of products and solutions in Arm's automotive line of business; Chuck Alpert, R&D automotive fellow at Cadence; Steve Spadon... » read more

Power-Aware Revolution In Automated Test For ICs


As semiconductor devices advance in complexity and sensitivity to power fluctuations, the integration of power-aware automatic test pattern generation (ATPG) is becoming indispensable for yield and the overall functionality of a chip. Unlike traditional ATPG, which generates test patterns solely to ensure device functionality, power-aware ATPG takes it a step further by meticulously consider... » read more

Speeding Up Metrology At Advanced Nodes


Experts at the Table: Semiconductor Engineering sat down to talk metrology at the most advanced nodes and the impact of using different substrates, with Frank Chen, director of applications and product management at Bruker Nano Surfaces & Metrology; John Hoffman, computer vision engineering manager at Nordson Test & Measurement; and Jiangtao Hu, senior technology director at Onto Inn... » read more

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