Tech Talk: Changes In Verification

By Ed Sperling - 27 Jan, 2014 - Comments: 0

Roger Hughes, director of strategic accounts at Real Intent, talks about what's changing in verification as design complexity increases and where engineers typically make mistakes. [youtube vid=0SE97LvCilo] » read more

Tech Talk: Dealing With The Unknowns

By Ed Sperling - 15 Jan, 2014 - Comments: 0

Rebecca Lipon, senior product marketing manager for verification at Synopsys, discusses the problematic X's and where verification teams typically make mistakes in trying to eliminate the false X's from their designs. Power emerges as the biggest problem. [youtube vid=Iym4ITWJJrs] » read more

Tech Talk: FPGA Prototyping

By Ed Sperling - 03 Jan, 2014 - Comments: 0

Neil Songcuan, senior product marketing manager at Synopsys, examines the hidden time savings from using an FPGA prototype platform for IP validation and software development, in addition to hardware design. While FPGA prototypes are a well known way of speeding up hardware design, their value in IP validation and software development for an integrated SoC is just beginning to surface. [you... » read more

Tech Talk: Security Risks In An SoC

By Ed Sperling - 02 Dec, 2013 - Comments: 1

Lawrence Loh, vice president of engineering at Jasper Design Automation, maps out the security threats in complex systems on chip. [youtube vid=5GBYOnCBfEE] » read more

Tech Talk: 2.5D Stacked Die

By Ed Sperling - 20 Nov, 2013 - Comments: 0

What's the motivation for moving to 2.5D packaging and architectures rather than following Moore's Law? Shafy Eltoukhy, VP of operations and technology development at Open-Silicon, talks with Semiconductor Engineering about adding another dimension in semiconductors. [youtube vid=HwpY9bUNt0w] » read more

Tech Talk: 16nm-14nm Effects And Challenges

By Ed Sperling - 06 Nov, 2013 - Comments: 0

Arvind Shanmugavel from Apache Design talks with Semiconductor Engineering about electromigration, electrostatic discharge and thermal effects caused by increasing power density in finFETs. [youtube vid=GOra5uYyIr8] » read more

New Pain And Inflection Points

By Ed Sperling - 24 Oct, 2013 - Comments: 0

Jack Harding, CEO of eSilicon, talks with Semiconductor Engineering about the explosion in the costs and the risk of semiconductor designs at the leading edge of Moore's Law. [youtube vid=HLS5QhnGHfM] » read more

Expert on Expert: The Higgs Boson

By Ed Sperling - 30 Sep, 2013 - Comments: 0

Mentor Graphics CEO Wally Rhines, a materials scientist, talks with Dr. Sean Carroll, a particle physicist at the California Institute of Technology about the discovery of the Higgs Boson, the cost of future discoveries, and what's left for physicists to discover. [youtube vid=qokwittw_8k] » read more

Executive Briefing: Prakash Narain

By Ed Sperling - 12 Jul, 2013 - Comments: 0

Real Intent CEO Prakash Narain talks with System-Level Design about where are the pain points in verification; different types of signoff; the impact of third-party IP, and can the tools industry keep up with the rising complexity in semiconductor design. [youtube vid=C25VMRDXGAQ] » read more

Foundry Talk

By Ed Sperling - 07 Jul, 2013 - Comments: 0

GlobalFoundries CEO Ajit Manocha sounds off on Foundry 2.0, 450mm wafers, lithography challenges, stacked die, the Internet of Things and the rush to the next process node. [youtube vid=WfjtlZkCi0w] » read more

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category: Videos

category: IoT, Security & Automotive

Tech Talk: Changes In Verification

Tech Talk: Dealing With The Unknowns

Tech Talk: FPGA Prototyping

Tech Talk: Security Risks In An SoC

Tech Talk: 2.5D Stacked Die

Tech Talk: 16nm-14nm Effects And Challenges

New Pain And Inflection Points

Expert on Expert: The Higgs Boson

Executive Briefing: Prakash Narain

Foundry Talk

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Knowledge Centers
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