Speeding Up Design Closure


Increasing complexity and smaller process nodes make it far more difficult to achieve design closure for chips. There are more physical effects to model, including noise, cross-talk, and double switching effects, all of which can slow the design process. Solaiman Rahim, vice president of engineering for Synopsys’ EDA Group, talks about why it’s so important to analyze violations in design, ... » read more

High-NA EUV Progress And Problems


High-NA EUV will enable logic scaling for at least the next couple process nodes. It’s complex, expensive, and a feat of optical engineering, but there are a lot of components with mixed progress. Harry Levinson, principal lithographer at HJL Lithography, talks  about when this technology will likely show up, what problems still need to be resolved, and what comes next. Related Readin... » read more

Tradeoffs In DSP Design


More intelligence is now required in the front-, mid-, and back-haul for 5G/6G communication, requiring a mix of high performance, low power, and enough flexibility to accommodate constantly changing protocols and algorithms. One solution to these conflicting goals involves reconfigurable DSPs, in which the processing element is hardwired like an ASIC but still configurable for a variety of app... » read more

New Approaches To Sensors And Sensing


Sensors are becoming more intelligent, more complex, and much more useful. They are being integrated with other sensors in sensor fusion, so a smart doorbell may only wake up when it’s imperative to see who’s at the door, and a microphone may only send alerts when there are cries for help or sounds of glass breaking. Kim Lee, senior director of system applications engineering at Infineon, t... » read more

Using AI To Close Coverage Gaps


Verification of complex, heterogeneous chips is becoming much more difficult and time-consuming. There are more corner cases, and devices have to last longer and behave according to spec throughout their lifetimes. This is where AI fits in. It can help identify redundancy and provide information about why a particular device or block may not be able to be fully covered, and it can do it in less... » read more

RTL Restructuring Issues


Modification of modules in RTL is the last place in chip design where changes can be made relatively easily before they reach physical design, but it’s still as complicated as the design itself — and it becomes more difficult in 3D-ICs. Jim Schultz, product marketing manager for digital design implementation at Synopsys, talks about grouping and ungrouping, re-parenting, and breaking connec... » read more

Megatrends At DAC


Spotting key trends over three days of a semiconductor design conference is a challenge, but some important ones come into focus after attending multiple sessions — AI/ML, chiplet integration, and heterogeneous integration in an SoC and package. Frank Schirrmeister, vice president solutions and business development at Arteris IP, talks about a variety of topics that fit under the DAC umbrella... » read more

Challenges Of Heterogeneous Integration


Heterogeneous integration opens the door to an almost unlimited number of features in a single package, but it also adds system-level challenges into a small space filled with a whole spectrum of possible interactions. Mike Kelly, vice president of chiplets/FCBGA integration at Amkor Technology, talks about a variety of issues ranging from uneven aging, warpage, and different mechanical stresse... » read more

Changes In Memory Design


An explosion of data in automotive, cloud, and AI are altering the fundamentals of memory design. One size no longer fits all, as memory is used for a broader set of applications, from automotive and cloud to consumer devices. Anand Theruvengadam, director of product management at Synopsys, talks about the impact of big data applications on density, memory stacking, and growing concerns about r... » read more

Striking A Balance In Acoustic Inspection


Sound energy is a quick way to to spot voids, delamination, cracks, and other possible defects that are accessible from outside the chip or package, as well as some defects that are inside of chips. But acoustic inspection also is highly sensitive to different materials with different polarities, which can change the reflection of sound waves. Bill Zuckerman, product marketing manager at Nordso... » read more

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