category: Videos

category: IoT, Security & Automotive

Physically Aware NoCs
By Ed Sperling - 06 Mar, 2023 - Comments: 0

More functions, greater security risks, and increasingly complicated integration of IP and various components below 7nm is increasing the time and effort it takes to get a functioning chip out the door. In many of these devices, the network on chip is the glue between various components, but it can take up to 10% to 12% of the total area of the SoC. Andy Nightingale, vice president of product m... » read more

Zero Trust Security In Chip Manufacturing
By Ed Sperling - 08 Feb, 2023 - Comments: 0

More equipment vendors and more IP are making the data in a fab much more valuable than in the past, and a potential target for hackers. What’s needed is a different approach to architecting and deploying services and equipment, so breaches can be stopped before they affect other equipment and data, and a better way of sharing data. Brian Buras, production analytics solution architect at Adva... » read more

Where Power Is Spent In HBM
By Ed Sperling - 06 Feb, 2023 - Comments: 0

HBM is gaining ground because of a spike in the amount of data that needs to be processed quickly, but big reductions in power are possible if that processing can be moved closer to the HBM modules, and if more can be done in each compute cycle without sending data back and forth to memory as frequently. Steven Woo, fellow and distinguished engineer at Rambus, talks about what can be done to bo... » read more

Improving PPA When Embedding FPGAs Into SoCs
By Ed Sperling - 31 Jan, 2023 - Comments: 0

Embedded FPGAs have been on everyone’s radar for years as a way of extending the life of chips developed at advanced nodes, but they typically have come with high performance and power overhead. That’s no longer the case, and the ability to control complex chips and keep them current with changes to algorithms and various protocols is significant step. Geoff Tate, CEO of Flex Logix, talks a... » read more

Choosing The Right Memory At The Edge
By Ed Sperling - 09 Jan, 2023 - Comments: 0

As the amount of data produced by sensors in cars and phones continues to grow, more of that data needs to be processed locally. It takes too much time and power to send it all to the cloud. But choosing the right memory for a particular application requires a series of tradeoffs involving cost, bandwidth, power, which can vary greatly by device, application, and even the data itself. Frank Fer... » read more

Multi-Die Integration
By Ed Sperling - 04 Jan, 2023 - Comments: 0

Putting multiple heterogeneous chips is the way forward for improved performance and more functionality, but it also brings a host of new challenges around partitioning, layout, and thermal. Michael Posner, senior director for die-to-die connectivity at Synopsys, talks about the advantages of 3D integration, why it’s finally going mainstream, and what’s needed in the EDA tools to make this ... » read more

Efficient Trace In RISC-V
By Ed Sperling - 19 Dec, 2022 - Comments: 0

Systems with RISC-V cores often include multiple types of other processors and accelerators. Peter Shields, product manager for Tessent at Siemens Digital Industries Software, talks about what's needed for debug and trace in context, including the need for unobtrusive observation at full speed, what to trace and when to trace it, and how embedded IP can identify to report which branches are tak... » read more

Heterogeneous Integration Issues And Developments
By Ed Sperling - 14 Dec, 2022 - Comments: 0

There are a slew of new developments in advanced packaging, from new materials, chiplets, and interconnect schemes, to challenges involving how to physically put chips in a package, metallization, thermal cycling, and parasitics in the interconnect path. Dick Otte, CEO of Promex Industries, talks about how this will change chip design and manufacturing, and how those changes are likely to unfol... » read more

Increased Photomask Density And Its Impact On EDA
By Ed Sperling - 13 Dec, 2022 - Comments: 0

The ability to print curvilinear shapes on photomasks can have big repercussions on semiconductor design. Aki Fujimura, CEO of D2S, explains why mask rule checking has been bound by complex design rules, and why curvilinear shapes are important for reducing margin and simplifying the chip design process. » read more

Silent Data Corruption
By Ed Sperling - 12 Dec, 2022 - Comments: 0

Defects can creep into chip manufacturing from anywhere, but the problem is getting worse at advanced nodes and in advanced packages where reduced pin access can make testing much more difficult. Ira Leventhal, vice president of U.S. Applied Research and Technology at Advantest America, talks about what’s causing these so-called silent data errors, how to find them, and why it now requires ma... » read more

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