Key considerations from design to test, including reliability, characterization and qualification.Key considerations from design to test, including reliability, characterization and qualification.
In developing high-quality and reliable MTP NVM, NVM IP providers must account for design and architectural considerations as well as comprehensive silicon testing. To help system-on-chip (SoC) designers select the highest reliability NVM IP, this white paper will review the key considerations involved in the entire process from design to test, including: key reliability specifications; designing-in reliability; and demonstrating reliability through characterization, qualification, and reliability testing.
To download this white paper, click here.
Experts at the Table, part 1: Shrinking features isn’t enough anymore. The big challenge now is how to achieve economies of scale and minimize complex integration issues.
Rising costs and gaps in equipment emerge as technology scales; new tools under development.
Explosion of data is forcing significant changes in where processing is done.
Researchers digging into ways around the von Neumann bottleneck.
Showing that a processor core adheres to a specification becomes more difficult when the specification is extensible.
Optimizing complex chips requires decisions about overall system architecture, and memory is a key variable.
Why data scrubbing and social issues could limit the speed of adoption and the usefulness of this technology.
Wally Rhines, Mentor’s CEO Emeritus, points to big shifts caused by AI, customization, uncertainty in the global economy and a changing customer base.
Smaller features and AI are creating system-level issues, but traditional ways of solving these problems don’t always work.
Agile development is gaining traction for developing hardware testbenches, but challenges remain.
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