IBM prints 29 nm-pitch directed self-assembly fin arrays with self-aligned process.
It can be difficult to make DSA structures other than uniform arrays. One solution is to print a grating over a large area, then use a “cut” mask to eliminate the unwanted features. The challenge, though, is that aligning the cut mask to an array of tightly spaced features, such as the fins for a FinFET transistor layer, can require extremely demanding overlay specifications. While reducing the fin pitch can substantially reduce parasitic capacitance, it also makes the overlay requirement more difficult.
As Hsinyu Tsai of IBM explained in Presentation 32.1 at this week’s IEEE Electron Device Meeting, a 28nm fin pitch was found to require 3nm overlay or better. While this may be achievable with next generation 193nm immersion lithography tools, it is likely to be especially challenging to maintain under production conditions.
Instead, the IBM group demonstrated a self-aligned approach to placing cuts between groups of DSA features. In the TIGER integration scheme (tone-inverted grapho-epitaxy), a resist template is used to constrain segregation of a PS-b-PMMA block co-polymer. The template, plus the polystyrene on either side of it, creates an “exclusion zone” from the BCP array. Then, as shown in the figure, a tone inversion material is used to convert “lines” into “spaces,” and vice versa. That is, the fin formation etch will remove material from the template region, leaving gaps in the otherwise uniform fin array. Finally, a conventional lithography step trims the line lengths to the desired values. Because this mask does not need to remove fins from the array, it can tolerate more relaxed overlay specifications.
Figure: Process flow for forming groups of silicon on insulator (SOI) fins using DSA. A tone inversion operation is applied after etch transferring the PMMA phase of the DSA
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