FinFETs, double patterning drive tools sales at the leading edge.
EDA and IP revenue jumped 3.8% in Q2 to $1.65 billion, up from $1.59 billion in the same period in 2013, spurred by the need for new tools to design, create and verify SoCs using 16/14nm finFETs.
Sequentially, the numbers reported by the EDA Consortium were down slightly from Q1, but the four-quarter moving average—considered a more reliable number because tools sales are long-term investments—was up 5.3%. Total revenue for the four quarters was $6.72 billion.
“Most of the growth in EDA comes from solving new problems,” said Wally Rhines, EDAC Market Statistics Service sponsor and chairman and CEO of Mentor Graphics. And there are plenty of new problems ahead. “3D is a new problem. 10nm will involve a lot of new things, including triple patterning, and at 10nm and 7nm we will see some EUV, which will require a new methodology. There also is the associated complexity from shrinkage in feature size. At 14nm, with finFETs, we’re seeing a power benefit, but also more parasitics, reliability issues, ESD and electromigration.”
In addition, this increase in complexity opens new opportunities for more, better and in some cases new verification tools and approaches, Rhines said.
By geography, the strongest growth was in Asia/Pacific, which showed an increase of 18% to $431.9 million. The Americas, still the largest market, bought $714.4 million worth of EDA products and services in Q2, up 1% from the same period in 2012, but the gap between the two markets is closing as design in Asia ramps up.
By category, CAE generated $611.1 million in sales for the quarter, up 1.2%; IC physical design and verification revenue was $376 million, up 14.7%; PCB and multichip modules accounted for $148.3 million up 5.2%; IP was $432 million, up 2.7%; and services were $86.1 million, up 1.2%.
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