Who’s Paying For Auto Chip Test?


Testing of automotive chips is becoming more difficult and time-consuming, and the problem is only going to get worse. There is more to this than simply developing new test equipment or devising a better design for test flow. There are multiple issues at play here, and some of them are at odds with the others. First, no one has experience using advanced-node chips in extreme environments.... » read more

7nm Design Challenges


Ty Garibay, CTO at ArterisIP, talks about the challenges of moving to 7nm, who’s likely to head there, how long it will take to develop chips at that node, and why it will be so expensive. This also raises questions about whether chips will begin to disaggregate at 7nm and 5nm. https://youtu.be/ZqCAbH678GE » read more

Market And Tech Inflections Ahead


Aart de Geus, chairman and co-CEO of Synopsys, sat down with Semiconductor Engineering to talk about the path to autonomous vehicles, industry dis-aggregation and re-aggregation, security issues, and who's going to pay for chips at advanced nodes. SE: All of a sudden we have a bunch of new markets opening up for electronics. We have assisted and autonomous driving, AI and machine learning, v... » read more

Dealing With Resistance In Chips


Chipmakers continue to scale the transistor at advanced nodes, but they are struggling to maintain the same pace with the other two critical parts of the device—the contacts and interconnects. That’s beginning to change, however. In fact, at 10nm/7nm, chipmakers are introducing new topologies and materials such as cobalt, which promises to boost the performance and reduce unwanted resist... » read more

Big Trouble At 3nm


As chipmakers begin to ramp up 10nm/7nm technologies in the market, vendors are also gearing up for the development of a next-generation transistor type at 3nm. Some have announced specific plans at 3nm, but the transition to this node is expected to be a long and bumpy one, filled with a slew of technical and cost challenges. For example, the design cost for a 3nm chip could exceed an eye-p... » read more

Near-Threshold Issues Deepen


Complex issues stemming from near-threshold computing, where the operating voltage and threshold voltage are very close together, are becoming more common at each new node. In fact, there are reports that the top five mobile chip companies, all with chips at 10/7nm, have had performance failures traced back to process variation and timing issues. Once a rather esoteric design technique, near... » read more

Extending The IC Roadmap


An Steegen, executive vice president of semiconductor technology and systems at Imec, sat down with Semiconductor Engineering to discuss IC scaling and chip packaging. Imec is working on next-generation transistors, but it is also developing several new technologies for IC packaging, such as a proprietary silicon bridge, a cooling technology and packaging modules. What follows are excerpts of t... » read more

The Power Of De-Integration


The idea that more functionality can be added into a single chip, or even into a single system, is falling out of vogue. For an increasing number of applications, it's no longer considered the best option for boosting performance or lowering power, and it costs too much. Hooman Moshar, vice president of engineering at Broadcom, said in a keynote speech at Mentor's User2User conference this w... » read more

Packaging Chips For Cars


As the complexity of automotive chips grows, so does the complexity of the package. In fact, packaging is becoming increasingly crucial to the performance and reliability of the chips, and both parts need to meet stringent safety standards before they are used inside a vehicle. This is true for all safety-critical applications, but for automotive in particular there are several key reasons w... » read more

More Nodes, New Problems


The rollout of leading-edge process nodes is accelerating rather than slowing down, defying predictions that device scaling would begin to subside due to rising costs and the increased difficulty of developing chips at those nodes. Costs are indeed rising. So are the number of design rules, which reflect skyrocketing complexity stemming from multiple patterning, more devices on a chip, and m... » read more

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