ESD Verification For 2.5D And 3D-ICs
Efficient methods for ESD verification of 2.5D and 3D-ICs.
Ensuring your integrated circuit (IC) design can withstand electrostatic discharge (ESD) events without incurring damage or failure is an extremely important activity in IC circuit design and verification. While automated flows for ESD verification are well-established for regular 2D ICs, 2.5D and 3D integration presents new challenges in both ESD design and verification. The new automated ESD verification methodology in Calibre 3DPERC (die2die) effectively and accurately addresses the emerging challenges for ESD robustness in 2.5/3D IC designs.
What you’ll learn:
- The challenges of verifying ESD robustness in 2.5D and 3D-ICs.
- How an automated 2.5D and 3D-IC ESD verification methodology address the ESD challenges and verify the ESD robustness.
- Why Calibre 3DPERC provides automated ESD verification for 2.5D and 3D-ICs, including a method for measuring point-to-point (P2P) parasitic resistance and current density (CD) for hybrid bond technology
Who should read this:
- IC verification engineers who need new and efficient methods of ESD verification for 2.5D and 3D-ICs.
- IC designers interested in ensuring 2.5D and 3D-IC design reliability.
To view this paper, click here.
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