Multi-Die Design Pushes Complexity To The Max


Multi-die/multi-chiplet design has thrown a wrench into the ability to manage design complexity, driving up costs per transistor, straining market windows, and sending the entire chip industry scrambling for new tools and methodologies. For multiple decades, the entire semiconductor design ecosystem — from EDA and IP providers to foundries and equipment makers — has evolved with the assu... » read more

Reduce 3D-IC Design Complexity: Early Package Assembly Verification


Uncover the unique challenges, along with the latest Calibre verification solutions, for 3D-IC design in this new technical paper. As 2.5D and 3D-ICs redefine the possibilities of semiconductor design, discover how Siemens is leading the way in verifying complex multi-dimensional systems, while shifting verification left to do so earlier in the design process. What you'll learn: Overcom... » read more

What Works Best For Chiplets


The semiconductor industry is preparing for the migration from proprietary chiplet-based systems to a more open chiplet ecosystem, in which chiplets fabricated by different companies of various technologies and device nodes can be integrated in a single package with acceptable yield. To make this work as expected, the chip industry will have to solve a variety of well-documented technical an... » read more

Using AI/ML To Minimize IR Drop


IR drop is becoming a much bigger problem as technology nodes scale and more components are packed into advanced packages. This is partly a result of physics, but it's also the result of how the design flow is structured. In most cases, AI/ML can help. The underlying problem is that moving to advanced process nodes, and now 3D-ICs, is driving current densities higher, while the power envelop... » read more

Faster And Better Floorplanning With ML-Based Macro Placement


The chips contained in today’s consumer and commercial electronic products are staggering in size and complexity. The largest devices include central processing units (CPUs), graphics processing units (GPUs), and system-on-chip (SoC) devices that integrate many functions on a single die. Additionally, chips are expanding beyond their traditional borders with multi-die approaches such as 2.5DI... » read more

What’s Missing In 2.5D EDA Tools


Gaps in EDA tool chains for 2.5D designs are limiting the adoption of this advanced packaging approach, which so far has been largely confined to high-performance computing. But as the rest of the chip industry begins migrating toward advanced packaging and chiplets, the EDA industry is starting to change direction. There are learning periods with all new technologies, and 2.5D advanced pack... » read more

3D-IC Intensifies Demand For Multi-Physics Simulation


The introduction of full 3D-ICs will require a simultaneous analysis of various physical effects under different workloads, a step-function change that will add complexity at every step of the design flow, expand and alter job responsibilities, and bring together the analog and digital design worlds in unprecedented ways. 3D-ICs will be the highest-performance advanced packaging option, in s... » read more

How Multiphysics Simulation Enables 3D-IC Implementation At The Speed Of Light


Electronic designers need greater integration densities and faster data transfer rates to meet the increased performance requirements of technologies like 5G/6G, autonomous driving, and artificial intelligence. The semiconductor industry is shifting toward 3D-IC design to keep up with the ever-growing demand for high-performance and power-efficient devices that has outpaced the capabilities o... » read more

Distributed Batteries Within a Heterogeneous 3D IC


A new technical paper titled "On-Chip Batteries as Distributed Energy Sources in Heterogeneous 2.5D/3D Integrated Circuits" was published by researchers at University of Florida (Gainesville) and Brookhaven National Lab. Abstract "Energy efficiency in digital systems faces challenges due to the constraints imposed by small-scale transistors. Moreover, the growing demand for portable consum... » read more

Intel, And Others, Inside


Intel this week made a strong case for how it will regain global process technology leadership, unfurling an aggressive technology and business roadmap that includes everything from several more process node shrinks that ultimately could scale into the single-digit angstrom range to a broad shift in how it approaches the market. Both will be essential for processing the huge amount of data for ... » read more

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