Fishing For Ideas In A Bigger Pond

How EDA companies are leveraging science and technology to solve system-level challenges.


By Ann Steffora Mutschler
From networking to optical modeling to open source software platforms, EDA engineers are drawing from a variety of disciplines to develop tools for chip design, stretching the technology beyond its original intent.

To this end, Synopsys acquired Optical Research Associates (ORA) last fall to add optical design and analysis to its portfolio. The acquisition allowed Synopsys to move into markets for displays and solid state lighting using light emitting diodes (LEDs), as well as semiconductor lithography equipment and cameras.

Aart de Geus, chairman and CEO of Synopsys, explained during the Synopsys Users Group conference this week that ORA is actually a relatively old company that has evolved itself over many, many years.

“The number of things they do is quite amazing – from car lights to lasers to the Hubble telescope-type things – but it’s all fundamentally the same principals, which are, ‘Can you model it? And if yes, can you then use it for design?’ If you can’t model, you can’t design with it. And the answer is increasingly, ‘Yes.’ Of course the sophistication of the light modeling is now very high. But it too goes all the way down to the fundamentals of physics, and although today there’s still quite a bit of distance between classical electronic design and optical design, over time for certain connections (and you can see it, of course, already in fiber) there’s no question that sending electrons is actually more expensive than sending photons,” he said.

Using an analogy to the cloud, de Geus said that one way to think about cloud is put a lot of compute power wherever you have an ability to generate energy, and an ability to cool it. “The availability of computational access is really via photons because you’re sending just the signals. You don’t send the whole computation there, in contrast to everybody having their own computer, their own cooling and so on, where you literally have the electrons in the house, or in the company. It’s an example where photonics, now for decades, has had major impact on something, relatively speaking, simple or very constrained.”

There’s no question that over time, connectors of light will become important in electronics, de Geus noted, but said this is not the reason Synopsys purchased ORA. “We bought it for a different reason: We were very interested in LEDs because we are already doing the TCAD for LEDs. One of the challenges with LEDs is how to actually constrain the means and essentially simulate the light because it’s all about efficiency. For us, that was the natural first adjacency.”

Networking on a smaller scale
Concepts developed by networking companies also have made their way into EDA to improve the way signals are routed inside an IC. The original idea was direct connections of a large number of wires from two IP blocks.

“That’s based upon the bit width of the communication,” said Kurt Shuler, director of marketing at Arteris. “For example, with a 64-bit AXI connection you’re looking at 290 wires. If you separate the transport layer from the transaction layer from the physical layer, network-on-chip technology allows you to separate whatever protocol or transaction layer stuff you are doing from the transport from the physical. So instead of using 290 wires, let’s say, for this particular connection from A to B—you don’t need a ton of bandwidth because it’s not a super-low-latency connection—you can use fewer wires.”

Network-on-chip technology is not just having a network. It’s actually taking the data, and just like on the Internet, it is packetized. If huge bandwidth or really low latency are not needed, in addition to packetization it can be sent serially. Instead of sending it 64 bits wide, two 32-bit packets can be sent.

“It sounds like a really simple thing, technology-wise, but it’s difficult to actually make it happen. It has taken many, many years to get to this point and there are two big benefits to that. One is when you are doing a big chip with 75 to 100 blocks of IP, for each additional block of IP added there is a much higher ratio of wires and gates for that interconnect. The amount of wires and gates in the interconnect grows faster than the number of IP blocks or transistors added,” Shuler continued.

In the big picture, the true visionaries find inspiration everywhere. “The question is where can’t you find techniques from outside brought to the chip design or SoC design because to me, it’s everywhere; every day I read stuff about new techniques of modeling,” said Pascal Chauvet, application architect at Sonics Inc.

“Recently I was looking at fluid-based models to model communication on chip,” he continued. “Whenever you start talking about chip modeling there are different areas, different techniques, different models of computation and a lot of mathematics involved. The fluid-based modeling is definitely coming from physics but you can see different things in terms of modeling for signal processing.”

He also noted that pretty much everything that has to do with architectural exploration today and system design borrows heavily from the software world.

“We do very highly configurable designs so an entire infrastructure for software tools for SoC and hardware design is very flexible. We have created a totally new environment that borrows a lot from advanced software engineering techniques on how to manage the configurability and how to make our hardware configurable. We rely heavily on data models, which means that for everything we do the configuration is stored in some kind of database,” Chauvet said.

This is not something you usually find in traditional hardware design but because of the nature of its architecture and the need for flexibility and configurability, it means everything the company does relies heavily on its software infrastructure for configurability. Sonics’ software infrastructure was built around the Python language, and its engineers modify the way regular HDL is written by embedding Python code to handle configurability.

As chip design becomes more complex, it seems likely that the EDA industry will follow developments in other markets. But the big question in the future is how EDA companies will actually define adjacencies and just how far afield the industry actually will stray.

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