Common security mistakes still made today by chip and device vendors.
Since 2001, Riscure has been helping chip vendors and device manufacturers improve the security of their products. Over the years, the security scenario has changed a lot. The attacker profile evolved from individuals motivated by curiosity, with very limited resources and attack potential, to well-funded and organized adversaries with dark motivations and the capacity to execute very sophisticated attacks. At the same time, security awareness also increased significantly. While designers and developers nowadays are more educated and prepared than ever to protect their products against security threats, we still see many avoidable mistakes repeated over and over.
Over the last 20 years, Riscure’s security analysts have seen every kind of embedded system, device, and chip imaginable. We have seen vulnerabilities ranging from simple mistakes to uncovering major new issues. Ultimately, the root problem for each of these issues is often the lack of knowledge or information. We asked our world class group of analysts and in this paper we present the most common issues, categorized by knowledge areas, and recommendations that can help mitigate these issues. Although the collected issues and recommendations are focused on the chip and embedded systems market, most of them are applicable to any other industry.
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Disaggregation and the wind-down of Moore’s Law have changed everything.
Different interconnect standards and packaging options being readied for mass chiplet adoption.
Continued expansion in new and existing markets points to massive and sustained growth.
Aging equipment and rising demand are pushing up prices and slowing production.
Experts at the Table: Designing for context, and geopolitical impacts on a global supply chain.
Interest in this particular ISA is expanding, but the growth of other open-source hardware is less certain.
Nanosheets are likeliest option throughout this decade, with CFETs and other exotic structures possible after that.
Hybrid bonding opens up whole new level of performance in packaging, but it’s not the only improvement.
Why this is becoming a bigger issue, and what can be done to mitigate the effects.
Some 300mm tools are converted to 200mm; equipment prices and chip manufacturing costs are rising.
From low resistance vias to buried power rails, it takes multiple strategies to usher in 2nm chips.
Manufacturing 3D structures will require atomic-level control of what’s removed and what stays on a wafer.
Disaggregation and the wind-down of Moore’s Law have changed everything.
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