The interconnect fabric is the backbone of any complex chip.
In multiple conversations over the years, I’ve often compared the interconnect fabric within SoC designs to the central nervous system of the human body. The point that I try to make is that the potential of the SoC’s performance and functionality is tied to the information that travels through the fabric and interconnect to all the on-chip IP components. Improving a chip’s ability to communicate and process information with the backbone of the chip is essential for unlocking the full performance potential.
System-on-Chip devices are much like the human body in many ways, but if you drew a side-by-side comparison, it’s clear that human anatomy is more highly evolved in one critical area – the central nervous system. The most advanced devices today possess powerful brains and memories, but the fabric tying it all together deserves greater research and development. Thankfully, the human central nervous system is an ideal model that can guide the industry forward.
As SoC platforms continue to gain momentum, the industry can improve the methods for linking the brain of the SoC with signal processing engines, graphics, I/O and memory. Imagine if chips were able to processes data and control functionality with the dazzling performance of the cerebral cortex.
Like the human body, SoCs are dominated by the brain of the system, which is the CPU complex. However, designers tie the brain to the other parts of the system through wires and an ever-increasing amount of logic, which are placed only after the all of IP blocks are laid out. All too often, this on-chip communications infrastructure is an afterthought, and the resulting wiring congestion and timing closure problems lead to numerous engineering change orders (ECOs), missed schedules and poor productivity. In many designs, actual performance falls way short of expectations because of bottlenecks and latencies introduced during implementation of the SoC interconnect fabric.
Fix Your Fabric to Fix Your SoC
While there are numerous challenges that plague SoC teams, unfortunately, I believe that interconnect concerns lie near the bottom of the list. What people fail to realize is that the interconnect fabric can be used to address the top concerns of developers.
In other words, fixing your fabric fixes your problems.
For many designers, interconnect technology development stalled after the transition from on-chip buses to cross bar architectures and remains one of their lowest development priorities. As a result, bottlenecks and inefficiency have cost us opportunities to improve performance, throughput, power dissipation and functionality.
From Microprocessor Focus to SoC
The semiconductor industry evolved to this place because of its acute focus on the microprocessor. We are now in the age of the system-on-chip. The world has evolved to where multiple brains connected by an interconnect fabric must not only share processing duties, but also data and peripheral access. At our universities, currently there are no courses that focus specifically on the fabric of the SoC. New graduates mistakenly believe that the interconnect fabric is simple and therefore deserves little attention. But that’s changing.
With a devotion to all things related to interconnect fabrics, we’ve transformed SoC design for many of the leading companies in the industry. In fact, some of the application processors and modems that utilize the NoC interconnect fabric enjoy a majority share of the fastest growing smartphone and tablet market segments. At Arteris, we view the network-on-chip approach is more like a human central nervous system for the SoC, providing four key enhancements over older technologies:
• Faster performance
• Lower power consumption
• Smaller die size
• Shorter and more predictable development schedules
SoC Evolution Requires Nervous System Optimization
While SoC technology is firmly established, it is still relatively early in its evolution. Many architects and developers are so focused on completing the next design that they miss the opportunity to take a step back to consider the inherent weaknesses in SoC design methodology. However, many of the most vexing design challenges can be addressed if they look at the chip as a whole and compare it to human anatomy. While designs today have highly developed brains and strong backbones, they require an improved central nervous system to advance their evolution.
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