GaN Manufacturing Meets Big Silicon

I have been talking about GaN on Silicon for several years because it offers a path to cost reduction in LED’s in the same way as silicon semiconductors. This year at Photonics West 2015, Aixtron presented its next generation 6-inch wafer system with all the automation that the semiconductor guys expect to be able to build GaN power transistors.

The systems are configured as cluster tools around an automatic wafer handler, and with factory automation interface. They can process 6 x 150 mm wafers in each chamber, and include a built-in automated clean that is as crucial as wafer handing in becoming compatible with silicon fabs. The presenter confidently asserted that the GaN quality on silicon was now indistinguishable from conventional sapphire substrates.

With a two-chamber cluster, the throughput is two wafers an hour, so while Aixtron has enabled GaN power devices, silicon photonics has a way to go. Line balance to all the other process steps is also very challenging with large wafers at these throughputs. The systems can run four-inch wafers, and that is probably a better choice for automated LED manufacturing at the moment.

Elsewhere at the show, Element 6 discussed the interest in growing synthetic diamond on GaN devices after separation from a growth substrate. The remarkable thermal conductivity of synthetic diamond is the attraction, and synthetic diamond is no longer an expensive exotic material. A substrate cost within 30% of sapphire means that diamond can be used in volume consumer products that are limited by heat dissipation.

Finally in the Gan session, GaN on graphene was discussed by a team from IBM. According to the authors, graphene is interesting as a growth surface for GaN because the hexagonal arrangement of the sp2 hybridized carbon atoms are similar to the (0001) c-plane of GaN. It has been dubbed “Van de Walls epitaxy”. They use graphene as a growth layer to recycle the underlying silicon carbide substrate.

Figure 1: Schematic for growth/transfer of single-crystalline thin films on/from epitaxial graphene. (a) Graphitization of a SiC substrate to form epitaxial graphene. (b) Epitaxial growth of GaN on graphene. (c) Deposition of stressor layer (Ni). (d) Release of GaN from substrate with handling tape. (e) Transfer of released GaN/Ni/tape stack to host substrate. (f) Removal of tape and Ni by thermal release and wet etch, leaving GaN film. Source: Semiconductor Today. 

How to get to ultra-efficient LEDs or 250 lm w-1 was discussed by Mary Crawford of Sandia National Labs. She identified three barriers—the loss of efficiency at high current (droop), low efficiency green, and spectral match to the eye. From her viewpoint the most likely solutions are nanorods with larger active area and lower current density, lasers for green, and nanostructured materials to tune the emission wavelengths for best match to the eye. My take was that patterning to create nanostructures was back on the agenda for advanced LEDs.

The trend toward automated-style silicon manufacturing for III-Vs continues apace. The general acceptance of separating GaN from the growth substrate and rebonding for heat sinking is allowing the introduction of diamond. In turn, diamond enables higher power transistors and LEDs. The wild card here is that ultra-efficient LEDs produce much less heat, so the heat sinking may suddenly be much less of an issue.