Lithography: How Slow Can We Go?

What happens to the economics of Moore’s Law if the pace of lithography innovation slows?


Moore’s Law has always been about economics:  if we follow the trend of Moore’s Law, we can reduce the cost per function for our integrated circuits, making chips more powerful for the same cost, or making chips of a given capability cheaper.  Historically, cost per function has decreased by about 29% per year, corresponding to a factor of 2 decrease in cost every two years.  There are signs that this historic cost reduction trend will slow down.  How much of a slowdown can our industry tolerate?  If the cost per function is expected to decrease by less than 10% per year going forward, it is unlikely that chipmakers will be willing to invest the massive amounts required for a new generation of fabs.  I suspect that the minimum cost per function decrease we can live with is about 15% per year.

What does this say about lithography costs and capabilities per technology node?  The cost/function of a chip is the ratio of the cost/area of finished silicon from making the chip and the functions/area that the technology node can deliver.  Over the last decade we have been on a 2-year technology shrink schedule, so that the functions/area double every two years.  Thus, by keeping the cost/area constant, we have been able to reduce cost/function by 29% per year.  If we stay on the same 2-year shrink cycle, a minimum allowed 15% cost/function decrease per year would allow a maximum of 20% increase in the cost/area of silicon each year.  Alternately, if we keep the cost/area of silicon constant, we could slow down the 2-year technology node shrink cycle to 4 years between technology nodes, and still get the required 15% reduction in cost/function per year.

Of course, everyone in the semiconductor industry would love to stay on our historic trends:  constant cost/area of finished silicon, and a two year cycle of doubling the functions/area.  It seems unlikely that this trend can be maintained during the current decade, however.  Thus, using a minimum allowed cost/function decrease of 15%/year as a target, we can either allow chipmaking costs/area to increase by 20% each year and stay on the 2-year technology node cycle, or we can allow our technology node cycle to slow to every four years while keeping manufacturing costs/area constant.  Either option will allow for continued success, and probably a bit of growth, for the semiconductor industry.  But if the technology shrinks come too slowly, or costs rise too quickly, the days of Moore’s Law will be numbered.