Automatically correcting sharp angles and acid traps with minimal change to routing layers.
Sharp angles, whether they create a spike in a poured shape or form an acid trap between two different pieces of metal, are a problem for us all. As designers, we will go out of our way to try and avoid creating these situations; they will still creep into your design despite the best of intentions.
How, then, can you efficiently rid your design of them with the minimal change to your routing layers? Fillets, or tear drops, are a first-order fix. The intersection of pads and traces are far from the only location you’ll find this type of problem.
Cadence Allegro Package Designer Plus’s Silicon Layout option package provides next-level support for automatic correction of acid traps with the 17.4 release.
For poured plane shapes, a near right angle may be acceptable. Technically speaking, 89.5 degrees IS less than 90 and is acute. All vertices in the layout must be snapped to the database manufacturing grid. Because of this, the Allegro products, by default, allow you 1 degree of grace on acute angles (unless you are working in a strictly orthogonal environment, even a 45-degree turn will often not be exact). This means that a right angle is taken as anything between 89 to 91 degrees.
For organic substrates, this tolerance is usually more than adequate. However, if your design is going to be manufactured in silicon, more restrictive rule decks may dictate that ANY angle below 90 degrees, no matter how little, should be trimmed.
Don’t let this be a cause for concern. In the past, Allegro layout tools have had an environment variable which could be used to adjust this tolerance. Shown below, the shape_right_angle_tolerance variable gave control over the amount of “wiggle room” for this classification.
Beginning with ISR9 of 17.4, however, this variable is being replaced by a design-level property. By pushing the control down into the database, you are assured that a design’s shape pour behavior remains consistent no matter who is editing or how their environment is configured (if you have the environment variable set in your environment today when you open the design in ISR9, the variable’s value will be used to seed the property behind the scenes).
For silicon substrates, then, setting this tolerance to zero will ensure compliance with the formal sign-off rule deck. This does NOT require that you switch your dynamic voiding parameters from Round to Full Round. Full Round will smooth right angles such as voids around your square pads. With a tolerance of zero, however, a true 90-degree angle will not be subject to rounding.
Above, my vertical segment bends very slightly to the right, creating an acute angle. The default 1-degree tolerance will not cause the shape on the inside of the cline bend to round. But, 0-degrees of allowance will give you a smooth, round transition if desired. Do you need to strictly avoid the acute corner or is a consistent distance to the cline edge more critical? Your manufacturing partner may be able to help with such decisions!
Now that we’ve covered the positive planes and removing sharp areas of metal, we’re left with the opposite problem: tight bends in the metal that lead to narrow areas between the edge. We’re talking about stuff like this:
These are a problem because you never intend to create them, but they can happen when you least expect it. It’s possible to create such a scenario between any two pieces of metal – a pin and a cline, a via and shape, even between two pads if they are close together.
While the Allegro Package Designer product has long included assembly DRC checks for acute angles, the Silicon Layout option adds an automated fixer. Driven by the DRC violation markers, it will add small amounts of metal at these areas to smooth out the transition areas. Check out the interface below:
In most cases, you will probably need this on all conductor layers in your design. But, the most important decisions you need to make are how much metal you want to allow the tool to add (the minimum corner distance) and whether the system can use arcs or must chamfer the bends. That choice may be driven largely by your manufacturing output format.
At the bottom of the form, there is a final, but crucial, list of object types. This list allows you to control what type of object the database views your smoothing objects as. A prioritized list, for each acute angle correction shape between two elements, the element type higher on the list is what the shape will be treated as.
Why is this important? Consider an acute angle between a cline and the shape it is entering. Shape to shape spacing is typically larger than shape to line spacing in your DRC constraints. By treating the acute angle fixer as a cline, then, dynamic voiding will be less aggressive pulling back nearby shapes and will allow vias, pins, and other traces closer to the shape.
When you are picking between chamfer and arc style corners, you can see the difference below:
The arc will provide a very gradual transition, smoothing things out like the Round or Full-Round on dynamic positive shapes. This will result in many very small segments if you are using GDSII as your manufacturing format (and thus require the arc be vectorized). In this case, you might favor the chamfer shape on the right; it will not require modification during stream out. What you see really will be what you get.
How do you smooth out your rough edges? When your team encounters these problems, what is your go-to solution for overcoming them? Consider giving the tools above a try. You may find they will save you hours of tedious effort!
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