tag: layout

Learning The AMS Circuit Representation From Layout Positions (UT Austin/ NVIDIA)
By Technical Paper Link - 15 Mar, 2023 - Comments: 0

A recent technical paper titled "TAG: Learning Circuit Spatial Embedding From Layouts" was published by researchers at UT Austin and NVIDIA. Abstract "Analog and mixed-signal (AMS) circuit designs still rely on human design expertise. Machine learning has been assisting circuit design automation by replacing human experience with artificial intelligence. This paper presents TAG, a new parad... » read more

Using In-Design Analysis Flows To Resolve Signal Integrity Issues
By Avijeet Singh - 06 May, 2021 - Comments: 0

In today’s ever-shrinking IC package design cycles, it is almost imperative that we catch and correct routing issues as early as possible, which makes simulation an integral part of the design cycle. Layout engineers want a quick and accurate way to find out the layout mistakes by looking at the changing impedance values and high coupling due to nearby signals. Unfortunately, layout engineers... » read more

3 Ways To Improve Design Collaboration: Part 3
By Simon Rance - 07 Jan, 2021 - Comments: 0

The first two blog posts in this three-part series focused on the design team’s capability to communicate efficiently. An accurate to-do list is the basis of providing accurate estimates for project release schedules. The Cliosoft VDD (Visual Design Diff) tool is an effective way to maintain a live and accurate “to-do list” for design engineers and managers alike. Additionally, it provide... » read more

Analog Chip Layout: Creativity Vs. Deadlines
By Benjamin Prautsch - 10 Sep, 2020 - Comments: 0

The entire design of integrated circuits, from the specification onward, depends on successful validation by measurement of microchips. One key milestone in this process is the completion of the layout. However, the path to reach this point can be quite difficult as many iterations are usually required. It includes: Iterations with the customer to finalize the specification. Iteratio... » read more

Make Acute Angles A Sharp Problem Of The Past
By Tyler Lockman - 13 Aug, 2020 - Comments: 0

Sharp angles, whether they create a spike in a poured shape or form an acid trap between two different pieces of metal, are a problem for us all. As designers, we will go out of our way to try and avoid creating these situations; they will still creep into your design despite the best of intentions. How, then, can you efficiently rid your design of them with the minimal change to your routin... » read more

3 Ways To Improve Design Collaboration: Part 2
By Amit Varde - 04 Jun, 2020 - Comments: 0

In the last blog in this series, we talked about how VDD can help design and layout engineers work more efficiently. Communicating precise and accurate information is a key factor in improving productivity, estimates, and the planning process. Visualizing the changes makes it easier to follow the technical details. The ECO (Engineering Change Order) phase is an important phase in the lifecycle... » read more

Layout Generators For Artificial Intelligence Hardware Design
By Benjamin Prautsch - 14 May, 2020 - Comments: 0

Artificial intelligence (AI) is a powerful tool that offers great convenience in many areas of life. In addition to improving Internet searches and online shopping, it enables driver assistance systems that can save lives, for example. AI in its various forms is the essential tool for such applications, and it can be expected to show a similar development as microelectronics did. Although AI... » read more

Visually Assisted Layout In Custom Design
By Ed Sperling - 29 Oct, 2019 - Comments: 0

Avina Verma, group director for R&D in Synopsys’ Design Group, explains why visual feedback and graphical guidance are so critical in complex layouts, particularly for mixed-signal environments. » read more

Fast-Track Your Early SoC Design Exploration And Verification
By Nermeen Hossam - 26 Sep, 2019 - Comments: 0

By Nermeen Hossam and John Ferguson Most advanced node system-on-chip (SoC) designs are very large, and very complex. They typically contain many blocks and intellectual property (IP) that perform specialized functions, such as computation, internal communications, and signal processing. These blocks are often built by separate teams or IP suppliers, and integrated into the SoC layout. Howev... » read more

Getting To Tape-Out Quicker With Analog Layout Generators
By Benjamin Prautsch - 08 Aug, 2019 - Comments: 0

All design engineers know it well: there is hardly any time left until tape-out, but the amount of work that remains is not decreasing as fast as the deadline is approaching. The intricate schematic must still be implemented as a layout, and many recurring tasks slow down the progress. The real crux often lies in specific parts of the circuit – parts that often have lower performance demands ... » read more

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