Margin Call

Ever since Moore’s Law passed 65nm, the discussion has focused on power versus performance. Do you run a chip faster and hotter, or do you keep performance about the same from one chip to the next and improve battery life.

At 28nm and beyond, there are other factors that begin to weigh into this discussion. One is reliability. Can a chip developed at the forefront of Moore’s Law be as reliable as one that is developed at older nodes? The gut reaction is yes, but the answer isn’t always so simple. The reason goes well beyond ensuring physical effects such as electromigration, cross-talk and even electron crashes don’t affect signal integrity. It also has to do with guard-banding—those extra wires and circuits put in to ensure the chip continues to work in the event of problems such as electromigration and even radiation effects—which can eat into both performance and energy efficiency.

Ultimately there may be ways to make up for some of this excess margin in 3D stacks. Overall margin can be held relatively constant by rationalizing memory usage for each processor on an SoC, particularly when there are multiple processors scattered throughout the design with dedicated functionality. This type of approach may take years before it becomes mainstream, however. In the meantime, designers will have to slim down the circuitry on their existing models and pray that it all works as planned.

A second reason, which is related, has to do with commercially available IP. Until now, the real value in IP is the speed and ease with which it can be implemented in a design. A Lego-like approach is a huge win when it comes to addressing time-to-market pressure. Being sure that an IP block or subsystem will work in any design is incredibly difficult, and it requires a lot of pre-characterization so designers know how it will perform in the context of a specific design. But flexibility also comes at a price, and again the problem is margin. The problem is that this time it’s from a supplier and it comes a ready-made black box that isn’t so easy to alter.

There are no simple answers to how to solve these problems, and there certainly is no single answer. The only thing that is certain is that these issues will become more glaring as we march forward to 20nm and 14nm, and power will continue to be the main driver for slimming margins on every front. The only question now is what the ultimate cost will be.