Random walk-based solvers can provide accurate parasitic extraction for sophisticated use models, allowing design teams to improve processing performance.
In-design verification is opening new opportunities to shorten design cycles and maximize circuit performance. Whereas physical verification has traditionally required a tradeoff between accuracy and performance for larger designs, recent advances in large-scale distributed computing may offer an alternative. Cloud infrastructure needs are pushing the industry toward larger multi-core server architectures and massively parallel computing frameworks. To address the larger designs necessary for today’s market, massively parallel computing frameworks and in-design-based parallel extraction, enabled through tools such as Cadence Virtuoso Layout Suite for Electrically Aware Design (EAD), will allow random walk-based solvers to provide accurate parasitic extraction to support more sophisticated use models and enable better optimization and faster processing.
To read more, click here.
New market opportunities and global competitiveness are limited by qualified people.
Better algorithms and more data could bolster adoption, particularly at advanced nodes.
Showing that a processor core adheres to a specification becomes more difficult when the specification is extensible.
New approaches are competing for attention as scaling benefits diminish.
Deeper understanding of equipment behavior and market needs will have broad impact across the semiconductor supply chain.
This will go down as a good year for the semiconductor industry, where new markets and innovation were both necessary and rewarded.
Researchers digging into ways around the von Neumann bottleneck.
Showing that a processor core adheres to a specification becomes more difficult when the specification is extensible.
The term creates hope for some, fear for others, and confusion for all.
Optimizing complex chips requires decisions about overall system architecture, and memory is a key variable.
While CPUs continue to evolve, performance is no longer limited to a single processor type or process geometry.
Why data scrubbing and social issues could limit the speed of adoption and the usefulness of this technology.
 |
 |
 |
 |
 |
 |
 |
 |
 |
 |
Leave a Reply