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Model Variation And Its Impact On Cell Characterization

New methodologies are required to deal with local variation at advanced nodes.

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EDA (Electronic Design Automation) cell characterization tools have been used extensively to generate models for timing, power and noise at a rapidly growing number of process corners. Today, model variation has become a critical component of cell characterization. Variation can impact circuit timing due to process, voltage, and temperature changes and can lead to timing violations, resulting in a costly re-spin of the design. While global variation is captured by analyzing the design at different process corners, local variation cannot be handled effectively with just the traditional corner-based static timing analysis (STA). As designers try to squeeze every ounce of power-performance-area (PPA), packing millions of transistors into the chip, local variation effects have become more and more prominent. In today’s most advanced nodes at 7nm and below, there is a strong need for innovative methods to reduce pessimism and to provide a better design margining methodology to accurately account for the impact of variation.

Evolution of on-chip variation and the need for Liberty Variation Format (LVF)

The figure below summarizes how on-chip variation (OCV) margining approaches have evolved and how Liberty Variation Format (LVF) and moment-based LVF have become mandatory at 7nm and below. As we have moved from OCV to LVF, accuracy has improved, but with a substantially increased cost of running characterization.


Fig. 1: Evolution of margining technologies for on-chip variation.

Also, the latest devices and applications in the mobile and IoT markets have pushed toward reduced power, which has further driven down operating voltage levels to near or sub-threshold operation. This has created an immense challenge for IC designers as non-Gaussian timing variation is more prevalent at ultra-low voltage and this poses a bigger impact on design robustness and yield.

Moment-based LVF models non-Gaussian timing variation observed at ultra-low voltage corners. To capture more detailed timing variation distributions, moment-based LVF extensions include mean-shift, standard deviation and skewness.

Characterization methodologies for LVF

Monte Carlo is the golden reference for statistical characterization. While this method can be effective, unless the characterization engineer has months to years to deliver models, this method of random samples for extracting sigma can only be realistically used for validation.


Fig. 2: Characterization methods using Monte Carlo and sensitivity based analysis.

A second methodology is sensitivity based analysis (SBA), the method of estimating the variation distribution as a Gaussian curve by calculating sensitivity of the delay/slew/constraint of each parameter on each transistor. This approach sweeps the process parameters explicitly during simulation and employs three point analysis using nominal and +/- 3 sigma variation. While SBA works well for Gaussian distributions, at ultra-low voltage distributions are becoming non-Gaussian.

To improve the LVF models for ultra-low voltages, the latest method is based on machine learning (ML). This methodology uses an ML strategy with enhancements in the approach to find and accumulate sufficient data at regions of interest to enable accurate modeling of non-Gaussian distributions.


Fig. 3: Characterization methods using machine learning.

With an ML-based methodology for LVF characterization, we see the best of both worlds. That is, achieving runtime performance while giving accuracy for ultra-low voltage LVF.

Summary

LVF characterization has become a necessity to model variation at 22nm nodes and below. Moment-based LVF is targeted toward improving accuracy at ultra-low voltage corners. All this LVF characterization costs runtime. Synopsys is deploying upgrades to its characterization tools to improve the runtime significantly in order to mitigate the 3X increase in characterization cost at every node from 7nm to 5nm to 3nm.

With the latest innovations in Synopsys’s library characterization, designers can achieve faster and more accurate variation models with the goal of generating PrimeTime signoff quality libraries. You can learn more about the close collaboration and integration between various Synopsys signoff products here, or contact your local Synopsys sales representative.



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