Week In Review: Auto, Security, Pervasive Computing


Automotive Cadence will be capturing design insights from Presto Engineering, an ASIC designer working on high-performance system-in-package (SiP) development for the automotive and Industrial IoT markets. Presto, which also provides semiconductor services such as test and qualification, will use Cadence’s EDA and analysis tools (Allegro X Package Designer Plus, Clarity 3D Solver, Sigrity Xt... » read more

CEO Outlook: More Data, More Integration, Same Deadlines


Experts at the Table: Semiconductor Engineering sat down to discuss the future of chip design and EDA tools with Lip-Bu Tan, CEO of Cadence; Simon Segars, CEO of Arm; Joseph Sawicki, executive vice president of Siemens IC EDA; John Kibarian, CEO of PDF Solutions; Prakash Narain, president and CEO of Real Intent; Dean Drako, president and CEO of IC Manage; and Babak Taheri, CEO of Silvaco. What ... » read more

Blog Review: June 23


Synopsys' Manuel Mota shows how splitting SoCs into smaller dies for advanced packaging and using die-to-die interfaces to enable high bandwidth, low latency, and low power connectivity can benefit hyperscale data centers. Siemens EDA's Chris Spear explains the relationship between classes and objects in SystemVerilog with a handy visualization and notes the difference between SystemVerilog ... » read more

Week In Review: Design, Low Power


Rambus is making a push for Compute Express Link (CXL) with two acquisitions and the launch of its CXL Memory Interconnect Initiative. The initiative aims to define and develop semiconductor solutions for advanced data center architectures, with initial research and development focusing on solutions to support key memory expansion and pooling use cases. CXL is an open interconnect specificat... » read more

Week In Review: Auto, Security, Pervasive Computing


Automotive U.S. electric truck manufacturer Lordstown Motors has an electric truck but after a large buyer fell through, it admitted it does not have any firm orders on its trucks, according to an AP story. The CEO and CFO resigned earlier this week. The electric car company Canoo announced its US manufacturing facility will be in Oklahoma. Cadence revealed its Tensilica FloatingPoint DSP (... » read more

Shifting Toward Data-Driven Chip Architectures


An explosion in data is forcing chipmakers to rethink where to process data, which are the best types of processors and memories for different types of data, and how to structure, partition and prioritize the movement of raw and processed data. New chips from systems companies such as Google, Facebook, Alibaba, and IBM all incorporate this approach. So do those developed by vendors like Appl... » read more

Blog Review: June 16


Arm's Adrian Herrera explores the latest version of AMBA ATP Engine, an open-source implementation of the AMBA Adaptive Traffic Profiles (ATP) synthetic traffic framework specification, which adds the ability to program AMBA ATP traffic generation from Linux environments. Cadence's Paul McLellan finds out just how effective glitching chips is by delivering incorrect voltages and clock freque... » read more

How To Improve Software? Start With The Hardware


By Travis Walton and Udi Maor Physicist Art Rosenfeld was working late at Lawrence Berkeley National Lab one night in 1973 when he noticed it. Despite an ongoing energy crisis, his colleagues routinely left their lights on after they left. Waste was one of the largest consumers of power in the state, he soon discovered: pilot lights consumed 10% of gas in homes. Switching from physics to ... » read more

Thermal Floorplanning For Chips


Heat management is becoming crucial to an increasing number of chips, and it's one of a growing number of interconnected factors that must be considered throughout the entire development flow. At the same time, design requirements are exacerbating thermal problems. Those designs either have to increase margins or become more intelligent about the way heat is generated, distributed, and dissi... » read more

Customizing Chips For Power And Performance


Sandro Cerato, senior vice president and CTO of the Power & Sensor Systems Business Unit at Infineon Technologies, sat down with Semiconductor Engineering to talk about fundamental shifts in chip design with the rollout of the edge, AI, and more customized solutions. What follows are excerpts of that conversation. SE: The chip market is starting to fall into three distinct buckets, the e... » read more

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