Week In Review: Auto, Security, Pervasive Computing

US EV shifts; Cadence FloatingPoint DSPs; Arm’s TSMC tested POP IP.


U.S. electric truck manufacturer Lordstown Motors has an electric truck but after a large buyer fell through, it admitted it does not have any firm orders on its trucks, according to an AP story. The CEO and CFO resigned earlier this week. The electric car company Canoo announced its US manufacturing facility will be in Oklahoma.

Cadence revealed its Tensilica FloatingPoint DSP (digital signal processor) IP family for use in compute intensive floating-point applications in mobile, automotive, consumer, and hyperscale computing markets. Four cores are in the family now — KP1, KP6, KQ7, and KQ8. The cores have the same instruction set architecture (ISA) as the Tensilica DSPs’ add-on vector floating-point unit (VFPU), which should enable reuse and offloading of floating-point workloads. Cadence says the IP also takes up less area and less power than the VFPU versions. “Floating-point numbers, common in technical computations, underpin a host of radar applications that process large or unpredictable data sets,” said Ian Podkamien, VP and head of automotive at Vayyar Imaging in a press release. “We’ve successfully collaborated with Cadence on multiple generations of IP cores and are pleased to see them addressing this critical market need and expanding their proven Tensilica product line. FloatingPoint DSPs optimized for a variety of applications can enable Vayyar’s system-on-chip sensors to improve energy efficiency and performance across the automotive, elder care, smart home, retail, HLS, robotics and medical industries, among others.” Uses include AL/ML, automotive, radar, lidar, vision sensing, sensor fusion, motor control, AR/VR, drones, robotics, and HPC/data centers.

Some chips and virtual models are now available from STMicroelectronics automotive Stellar SR6 P and G series. The MCU series targets high-end body and drivetrain domain and zone controllers in automotive. can scale up or down. Six Arm Cortex-R52 cores with lockstep and split/lock capabilities are ready to meet ISO 26262 ASIL-D requirements. Also included are three Arm Cortex-M4 cores have with floating-point arithmetic unit and DSP extensions for application-specific acceleration and security subsystem. Stellar SR6 is made on ST’s FD-SOI process and has 20 Mbytes of phase-change memory (PCM). The chips use dual-image storage for efficient over-the-air (OTA) reprogramming. The OTA system can enlarge the PCM during updates to fit the dual image. The ICs are compliant with AEC-Q100 Grade 0. The Stellar series is targeted for 2024 production but some versions are available now.

JEDEC Solid State Technology Association released a new standard to ease the sharing of data from simulating thermal models of electronics designs. Siemens worked on the new XML-based JEP181 standard for thermal and announced it this week. JEP181 standard simplifies thermal model data sharing between suppliers and end-users in a single file format called ECXML (Electronics Cooling eXtensible Markup Language).

Ansys’ Redhawk-SC and Totem power integrity platforms are now certified for TSMC’s industry-leading N3 and N4 process technologies. The platforms help users achieve multiphysics signoff for customers who need to meet power, thermal and reliability standards for highly sophisticated artificial intelligence/machine learning, 5G, high-performance computing (HPC), networking and autonomous vehicle chips.

Arm’s POP IP for Armv9-A architecture has been tested on TSMC’s 3nm process. POP IP is a core-hardening acceleration technology. “We’re pleased with the result of collaboration with Arm in delivering Arm cores with POP IP on TSMC’s advanced process,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC.  The recently announced Armv9 was designed for high performance and low power applications that need some AI computing, such as premium mobile and hyperscale-cloud.

Advantest is running pilot tests of an SoC test system that will perform both high-speed scan testing and software-driven functional device testing and correlate the data between the tests. Using the existing high-speed serial I/O interfaces on advanced ICs, the system will correlate scan testing results between established and new test routines, boot up and execute on-chip test software. Advantest is working with EDA partners, specifically Synopsys, to develop the system and anticipates having a modular card architecture ready next year.  The test is running on Advantest’s V93000 platform, an SoC tester.  “Working with Synopsys and other companies in the EDA sector, we are making it possible to leverage test data from design through manufacturing to validate highly complex, new device designs in all stages of the manufacturing process,” said Juergen Serrer, managing executive officer responsible for Advantest’s V93000 Business Unit. “Anticipating the need for high-speed tests, Synopsys has collaborated with Advantest to bring to market integrated solutions that represent the industry’s first functional interface-based, high-bandwidth test solution, providing our customers accelerated test times while maintaining comprehensive test coverage and enabling software-based functional tests,” said Amit Sanghani, senior vice president, Hardware Analytics and Test Group at Synopsys.

Sequitur Labs introduced a cloud-based offering that securely monitors, manages, and updates IoT devices. Calling it Trust-as-a-Service for edge devices, the company says its EmPOWER Service addresses technical, IP, supply chain, and business-process challenges faced by IoT developers and manufacturers dealing with the acceleration of artificial intelligence at the network edge. Trust-as-a-Service enables complete device security for different life stages, including secure provisioning, over-the-air (OTA) updates, threat detection and remediation, behavioral analytics, and credentials management. Devices that are always on or intermittently connected, with multiple roots of trust, or requiring secure command and control are protected by a robust Trust-as-a-Service platform.

Ransomware attacks have been in the news lately, with high profile infrastructure and company attacks in the U.S. perpetrated by Russian actors. The cyberattacks were top on the agenda as the presidents of U.S. and Russia met this week in Geneva. President Biden reminded President Putin that the U.S. has cyberattack capabilities also and warned there are some off-limits infrastructure. Meanwhile in Ukraine police cracked down on a ransomware ring in Ukraine. They arrested suspects and seized cash. The U.S. government is advising citizens how to avoid ransomware and prepare for it. Don’t pay the ransom, call the FBI if you are attacked. CISA has advice on its website about how to avoid the attacks in the first place and what to do if they happen.

Pervasive computing — IoT, edge, cloud, data center, and back
To boost its data center offerings, Rambus will acquire AnalogX, known for low-power multi-standard connectivity SerDes products, DSP-based design, and PAM4 signaling. “As data centers move to a disaggregated model, high-speed connectivity will be instrumental to unleashing the performance of data-intensive computing platforms,” said Luc Seraphin, president and CEO of Rambus in a press release. “The industry-leading PHYs and DSP design expertise from AnalogX will feed our roadmap for data center interconnect chips and expand our reach to new applications across data center, AI/ML, and 5G.” Rambus will also acquire PLDA, known for its work on Compute Express Link (CXL) and PCI Express (PCIe) digital products. PLDA CXL 2.0, PCIe 5.0 and PCIe 6.0 controller and switch IP will grow Rambus’ data center and HPC portfolio, enhancing the Rambus roadmap for PCIe 6.0 and CXL 3.0. Also, Rambus’ newly announced research program — the CXL Memory Interconnect Initiative — will benefit from both acquisitions. The program will research into the disaggregated architectures access shared, scalable pools of memory and computing resources. Rambus is interested in finding ways to improve the performance, cost, and security of these systems, in which the open standard CXL will play a role connecting pools. Both acquisitions are expected to close in the third calendar quarter of 2021.

A report from Reportlinker says the global RF semiconductors market will reach $27.3 Billion by 2027. Filters will hit 7.9% CAGR and reach US$12.4 Billion, the report predicts. Also tracked are power amplifiers, which will hit 7.3% CAGR by 2027, switches (6.4% CAGR), and low noise amplifiers.

People, companies
Industry association SEMI urged the U.S. and the E.U. to cooperate more on technology and trade, by sending letters to U.S. President Joe Biden, European Commission President Ursula von der Leyen, and European Commissioner Thierry Breton, before the European Commission and U.S officials met. SEMI requested” stronger dialogue between the European Union and United States on technology governance and the global rules-based trading system.” SEMI also announced its support of the Fabs Act that was just introduced in the U.S. Senate. The Act would created a permanent 25% federal tax credit for semiconductor manufacturing and equipment investments. The Facilitating American-Built Semiconductors (FABS) Act is a bi-partisan proposal.

Read the most recent Automotive, Security, & Pervasive Computing newsletter. Check out job, event, and webinar Boards: Find industry jobs and upcoming conferences and webinars all in one place on Semiconductor Engineering. Knowledge Center: Boost your semiconductor industry knowledge. Videos: See the latest Semiconductor Engineering videos.

July 26 is the call for papers deadline for IEEE’s International Conference on Physical Assurance & Inspection Of Electronics (PAINE), which will be held 11/30-12/2/21. Speakers from DARPA, Navy, Intel and others. Topics include PCB trust & assurance, counterfeiting, fault injection assessment and countermeasures and more.

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