Reducing Power In Plasma Display Panels

By the EEFocus staff
In early 2009 there was a lot of coverage in the media at home and abroad about plasma display panel (PDP) TV sets being banned in the EU. Paul Gray, Director of European TV Research, denied the claim but did mention that they were planning to set minimum energy efficiency standards for flat-panel TVs and set maximum energy consumption limits according to screen sizes. He also said they would require manufacturers to reduce standby power consumption of TVs to less than 1 watt within about a year.

While the EU hasn’t really proposed a ban on the sale of PDP TV sets, it still will put severe restrictions on the (standby and average) power consumption of these products, which will compel companies to make relentless improvements and conduct research to reduce power consumption, enhance power factors and improve luminescence efficiency.

Here are the areas that will be affected:

1. Power Supplies
As an important component of PDPs, the power supply should be efficient and small, provide large transient output power, and have protection function and the function to start different output voltages in sequence.

A traditional PDP power supply generally applies a two-stage scheme, namely, power factor correction (PFC) stage plus a DC-DC conversion circuit topology, each with its own switching device and control circuit. Although it can get good performance, it’s too large and expensive and the circuit is rather complicated. Therefore, its optimization and transformation has become a direction in the PDP power technology research.

PFC modules and scan driver electrode DC-DC conversion modules account for a large proportion of both the transmission energy and space. Therefore, it’s better to start the PDP switching power optimization and transformation from the transformation of these two modules.

There are two optimization solutions available at present. One is a single-stage PFC (SSPFC) circuit, which has become a preferred solution to small-scale PDP switching power transformation due to its small size and simple circuitry. The basic principle is that by adopting single-stage PFC converter circuit topology, full-wave rectified single-phase AC power is connected to dual-transistor flyback DC-DC conversion unit by being in series with two inductive ICs. In the half-power frequency cycle, the inductive current only works continuously part of the time.

A second approach is to use power-factor control chips to carry out active PFC.

2. Drive Circuits
In the total power consumption of a PDP not all of it is gas discharge power consumption, because in the drive circuit high-power and high-frequency switching circuits are needed to provide a variety of high-voltage pulses needed by gas discharge. Although the parasitic capacitance of a PDP screen doesn’t consume energy, its charge and discharge will lead to the energy depletion in the circuit resistance and electrode lead resistance.

The voltage amplitude of a PDP drive circuit is from negative tens of volts to positive hundreds of volts, the working frequency is 100 to 233kHz, and the design and selection of drive circuit is particularly important to the image quality and work efficiency of PDP.

Among PDP drive circuits, the address drive circuit has the highest frequency. Therefore, in addition to using energy recovery technology in the address drive circuit, reducing the pulse voltage of the address drive circuit also can significantly reduce the addressing power consumption. The address voltage pulse can be reduced in the following ways:

● Address while Display (AwD) – Address, sustain and erase pulses combined together can reduce the addressing voltage, thereby reducing useless power consumption. Meanwhile, as the maintenance time occupies most of the time of a sub-field, the frequency of the sustain pulse can be reduced.

● Erase address – After the initialization it enters the light-emitting sustaining phase, and when the gray scale meets requirements it extinguishes these units by erasing addresses. There is only one-time addressing for each pixel in each field, which effectively reduces the power consumption by using low erase voltage and current.

● Changing the work mode of pulse circuit – The switching component can work in the switch tube zero-voltage/current-switching (ZVS or ZCS) state to reduce the switching depletion of the component itself.

In the large-size PDP display, the row/column driver IC consumes a lot. Its power consumption roughly consists of three parts: logic, level-shift register and high-voltage drive. Under normal circumstances, the logic part consumes less than 20mW and the level-shift register part consumes less than 200mW. The useless power consumption of high-voltage drive circuit generated by the charging and discharging of the screen capacitance mainly results from the parasitic load in the loop – the consumption of resistive component. The existence of the resistive component is inevitable, but for the capacitor charging and discharging power, the drive IC can manage to recover a part of it through built-in energy recovery circuit.

To meet the requirements on the operating performance of high-voltage devices, and reduce the useless power consumption of the high-voltage drive part, we should take the following control measures in the design and technique of PDP drive IC, which should be more stringent than that for an ordinary IC.

● Adopt SOI process structure, which can significantly reduce energy consumption compared with the conventional power module;

● Adopt dielectric isolation to avoid the interference among output clamping diodes in the drive IC;

● Give special treatment to internal component structure and layout, and the tunneling current at high voltage switch can be eliminated through internal control;

3. Type Selection of MOS Transistor
The power MOSFET with appropriate parameters can make the drive circuit work efficiently and be more stable in its normal lifecycle. The transition of MOSFETs should be fast enough to reduce the switch loss; the on-resistance should be low enough to reduce the turn-on loss; and the off-resistance should be high enough to increase isolation.

The drain-source on-resistance, reverse recovery time, input capacitance and total gate charge should be given serious attention. Low on-resistance will help reduce the turn-on loss, especially with the MOS transistor related to the “energy recovery circuit,” improve energy recovery efficiency, and reduce the power consumption of PDP. Combined, these can reduce the drive power of MOSFET gate and simplify the design of the gate drive circuit.

The gate drive circuit is an external factor affecting the switch loss of MOS transistor, and only the integration of the excellent gate drive circuit and high-performance MOSFET can make the high-performance PDP drive circuit.

4. Phosphor Materials
New luminescent materials need to be developed. Phosphor materials directly affect the luminescent efficiency and lifespan of PDP TV set, and the lifespan of a PDP TV generally refers to the time it takes for the TV to lose half of its original brightness. Next-generation tailor-made PDP phosphors with long lifespan and high luminescence are now available on the market.

5. Electrode Structure
Although increasing electrode spacing is an effective measure to enhance the brightness and luminous efficiency of PDP, larger spacing needs higher supply voltage. To address this challenge, a floating electrode can be added between the sustaining electrode and scanning electrode, which does not add voltage signal during cell operation but generates some inductive kick amid single sustaining voltage pulse.

6. Others
Useless power consumption needs to be taken into full consideration in terms of logic control, master core boards etc. For example, we can employ the clock-gating method for logic control and close all internal registers in standby state to eliminate useless power consumption.

In conclusion, we can reduce the power consumption of PDP from many perspectives, and simultaneously proceed from power supply, drive mode, phosphor materials, structure of discharge chamber and new high-voltage technique to maximize the efficiency.

EEFocus is the Chinese Media Partner of Low-Power Engineering.