tag: low-power engineering

Cost vs. Value
By Ann Mutschler - 10 May, 2013 - Comments: 0

By Ann Steffora Mutschler The increasing amount of mixed-signal content being included in SoCs for automotive, networking and all manner of mobile devices is reinvigorating the mixed-signal industry. While this is great news for companies playing in anything related to mixed-signal technology, it also means increasing complexity for the engineering teams pulling all the pieces together. “... » read more

Power Changes Everything
By Ed Sperling - 14 Apr, 2011 - Comments: 0

By Ann Steffora Mutschler Optimizing design methodologies for effective power utilization sometimes meaning throwing out old ideas and approaches and starting fresh. This is exactly what wireless chip giant Broadcom did in its quest to manage power in its chips. Low-Power Engineering spoke with Michael Hurlston, vice president of the mobile wireless group at Broadcom, to discuss current and f... » read more

A New Reference For Low-Power Processors
By Ed Sperling - 09 Sep, 2010 - Comments: 0

By Pallab Chattejee Just how much power can you squeeze out of a processor without destroying performance? Ask IBM. The company introduced a new methodology for power and energy management on its multicore processor chips. The new PowerPC chip, the Power 7, has eight main processor cores each with its own L2 and L3 cache and two central memory controllers. The architecture for the design is... » read more

Estimating Power From Mobile Device Apps
By Ann Mutschler - 09 Sep, 2010 - Comments: 0

By Ann Steffora Mutschler How do software application developers – even the ones sitting at home on their living room sofas with laptops – measure the power consumption of their application on the target device? This is a big problem today (something that is painfully obvious to owners of iPhones or Blackberries), and it will only get bigger. Software engineers may think it is not their... » read more

Killer Bugs
By Ed Sperling - 08 Apr, 2010 - Comments: 0

By Ed Sperling Hardware and software bugs are all around us. When an application suddenly dies or a smart phone freezes because of the unanticipated interaction between hardware and software blocks in a system on chip, most users aren’t even the least bit fazed. They usually just re-boot and forget about it. Bugs caused by power are an entirely different matter, however. For one thing, ... » read more

Experts At The Table: Low-Power Management And Verification
By Ed Sperling - 19 Mar, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering moderated a panel featuring Bhanu Kapoor, president of Mimasic; John Goodenough, director of design technology at ARM; and Prapanna Tiwari, corporate applications engineer at Synopsys. What follows are excerpts of their presentations, as well as the question-and-answer exchange that followed. Prapanna Tiwari: Traditional techniques like clock-gating an... » read more

Virtualization In Your Hand
By Ed Sperling - 11 Mar, 2010 - Comments: 0

By Ed Sperling The addition of multiple cores inside of computers has created an enormous opportunity for virtualization. Instead of running one operating system or one application, a single server or multicore PC can run multiple virtualized OSes on a single machine at the same time. From the standpoint of energy efficiency, this has been a huge gain in data centers and the corporate ent... » read more

Experts At The Table: Low-Power Management And Verification
By Ed Sperling - 11 Mar, 2010 - Comments: 0

By Ed Sperling Low-Power Engineering moderated a panel featuring Bhanu Kapoor, president of Mimasic; John Goodenough, director of design technology at ARM; and Prapanna Tiwari, CAE manager at Synopsys. What follows are excerpts of their presentations, as well as the question-and-answer exchange that followed. Bhanu Kapoor: There are two types of power you need to consider: Dynamic power, ... » read more

Partitioning For Power
By Pallab Chatterjee - 11 Feb, 2010 - Comments: 0

By Pallab Chatterjee Design partitioning for power in an IC is driven by which functions are on simultaneously. The new generation of “smart” power management chips introduces new constraints to the task. Case in point: The new LP8725 from National Semiconductor. These chips have multiple DC-DC converters and both analog and digital low-dropout regulators (LDOs), with a common I2C inter... » read more

Experts At The Table: The Reliability Factor
By Ed Sperling - 22 Jan, 2010 - Comments: 0

Low-Power Engineering sat down to discuss reliability with Ken O’Neill, director of high-reliability product marketing at Actel; Brani Buric, executive vice president at Virage Logic; Bob Smith, vice president of marketing at Magma, and John Sanguinetti, chief technology officer at Forte Design Systems. What follows are excerpts of that conversation. LPE: As we push to the next process nod... » read more

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