What is voltage text annotation and why do you need it in your IC design?
As the potential for complex interactions between voltage domains grows significantly with the increase in design density at each new process node, the complexity of spacing checks in design rule checking (DRC) also increases. To minimize these types of risk, many simple spacing checks have evolved to become voltage-aware DRC (VA-DRC) checks that incorporate voltage values to determine the required spacing between geometries [1,2]. To enable a DRC tool to correctly apply VA-DRC, the VA-DRC methodology requires circuit designers to create voltage text in their design layouts. However, creating these texts manually (typically using marker layers) is both time-consuming and prone to human error, and even the smallest errors can create a huge number of false DRC errors that are very difficult to debug.
Fig. 1: DRC voltage text annotations.
A robust automated methodology is required to enable integrated circuit (IC) design companies to ensure DRC-clean designs while still achieving their tapeout schedules. In addition, a DRC tool running VA-DRC should be able to automatically incorporate these text annotations in the DRC flow, which removes the rule deck’s dependence on manual marker layers when running VA-DRC. For example, when developing their rule decks, many foundries now leverage the Calibre nmDRC platform’s ability to use text annotations in the design layout to identify different voltages, migrating away from the need for manual marker layers.
The Calibre PERC automated text annotation process can not only generate text annotations, but also check any existing text annotations for errors and conflicts to help ensure design coherence. Correcting these text annotations before tapeout is essential, since it’s impossible to trace all voltage texts that exist in a design layout when running signoff DRC, as multiple texts may exist at different levels of hierarchy in different intellectual property (IP) content.
When a net is already annotated with voltage information, engineers must ensure this information is unique and accurate. The Calibre PERC packaged checks provide two pre-coded text annotation check processes:
The text collision check reviews all existing text annotations in the design (figure 2). If multiple text annotations with different values are found on the same net, a text collision is reported. All information needed to enable engineers to easily identify any discrepancies is reported.
Fig. 2: The text collision check finds and reports text annotation conflicts before voltage propagation.
As shown in figure 3, the text collision check found 798 text annotations for 1.8V, and one conflicting text annotation for 3.3V, all for net 28 in layer M1_B. After voltage propagation, the correct voltage for this net is determined to be 1.8V. With this information, engineers can easily highlight the 3.3V text annotation and remove it from the database.
Fig. 3: A check of the text annotations on net 28 reveals one annotation with a value of 3.3V. After voltage propagation confirms the correct voltage for the net is 1.8V, this annotation can be removed.
The Calibre PERC packaged checks [3,4] use the unique voltage propagation capability [5] of the Calibre PERC reliability platform to automatically detect the accurate voltage for each net and create annotation text in the layout on the desired metal level (figure 4), in the form of a layout text file. The layout hierarchy is respected, and annotation texts are created at the lowest hierarchy possible.
Fig. 4: The Calibre VA-DRC flow accurately detects and annotates net voltage, and then uses that annotation to apply the appropriate VA-DRC spacing checks.
The generated voltages are created using a Calibre standard verification rules format (SVRF) layout text statement. This text file can then be included in any DRC rule file to directly run DRC, or used with the Calibre DESIGNrev interface to add these texts directly inside the layout database.
Accurate and repeatable reliability verification is now essential for both advanced node IC designs and the increasingly complex products being produced at established nodes. VA-DRC is a critical component of IC reliability verification, and relies on accurate voltage text annotations. The accuracy of VA-DRC is needed to achieve the high reliability and high yield that contribute to the market success. By leveraging the power of Calibre PERC packaged checks and automated text annotation in conjunction with the Calibre nmDRC platform, designers can run VA-DRC checks with confidence in the results, regardless of design complexity or process node. The automated text generation and verification flow provides all necessary design annotations, as well as guidance to help engineers fix inaccurate or conflicting voltage information, to ensure a successful sign-off DRC run with fast turnaround time for voltage-aware spacing rules.
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